> behavior. Mistakenly I was forcing the stack to be after idata, but idata
> starts at 0x80, so if there where many idata variables there was a good
> chance of running out of stack. That is exactly what happened.
Why shouldn't idata start before 0x80?
0x00..0x7f is directly and indirectly addressable,
0x80..0xff indirectly addressable only.
(Starting at 0x80 would mean that the original
8051 with only 128Byte internal RAM could use
no idata memory at all)
If you force stack to start after idata (as you did)
and have idata starting at the end of bit or data memory
whichever is larger this would (together with you new
algorithm) usually lead to:
0x00..0x07 register bank 0
0x08..0x0f register bank 1 or data
0x10..0x17 register bank 2 or data
0x18..0x1f register bank 3 or data
0x20..0x2f bit variables or data
0x30..0xff data or idata or stack (in the order named)
which is the layout I'd prefer if no options
are given to SDCC?
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