hi Philipp,

thanks a lot for that information! So it’s not even safe to always read low byte first, and write high byte first for 16b SFRs!? That really sucks… :-(  Any idea where I can get a list of correct orders for the registers? Surely ST has something like that…? 

Georg I.


Message: 1
Date: Fri, 18 Apr 2014 12:29:56 +0200
From: Philipp Klaus Krause <pkk@spth.de>
Subject: Re: [Sdcc-user] r/w order for STM8 16b registers
To: sdcc-user@lists.sourceforge.net
Message-ID: <5350FEA4.2000505@spth.de>
Content-Type: text/plain; charset=windows-1252

Signierter PGP Teil
Unfortunately, AFAIK, this is not the same for all 16-bit sfrs.

In particular, some of the timer-related registers we always need to
access the high byte first, followed by the low byte (both on reads
and write):

Examples from the STM8L101:

For the TIM_CNTR register, the high byte must be read first, followed
by the low byte.

For the TIM_AAR register, the high byte must be written first,
followed by the low byte.

But I think it is only the timer registers that are high byte first.


P.S.: If we can, we often want to read / write the low byte first,
since ldw is faster than to ld, and ldw reads / writes the low byte first.