Content-Type: Multipart/Alternative; boundary="------------Boundary-00=_EAZMLVC0000000000000" --------------Boundary-00=_EAZMLVC0000000000000 Content-Type: Text/Plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable =0D =0D Actually, you need to AND the RD and PSEN lines to run=0D from xram.=0D =0D =0D -------Original Message-------=0D =0D From: sdcc-user@lists.sourceforge.net=0D Date: Wednesday, March 12, 2003 12:25:15 AM=0D To: sdcc-user@lists.sourceforge.net=0D Subject: Re: [Sdcc-user] Designing a Dev Board For the 8051=0D =0D On Tue, 11 Mar 2003, you wrote:=0D > I have deviced a timing circuit for a 8051 running at=0D > 24Mhz. From my calculations, I believe each external ram =0D > instruction takes 250ns and my circuit takes =0D =0D What version of the 8051 want you to use ?=0D There are big differenzes in the Timing.=0D =0D For a generic 8051=0D =0D !PSEN goes low to fetch a Instuction.=0D !RD goes low to fetch xram via movx.=0D !WR goes down to write xram via movx. =0D ALE triggers the latching of the high 8 addressbits transmitted on P0.=0D =0D You need to "or" RD and PSEN to execute Programms in Xram.=0D =0D its better to use the 138 only for decodeing the Address to !CS=0D Then !RDor!PSEN can drive the !OE and !WR can drive RD/!WR from the Sram.= =0D =0D -- =0D MFG Gernot=0D =0D =0D -------------------------------------------------------=0D This SF.net email is sponsored by:Crypto Challenge is now open! =0D Get cracking and register here for some mind boggling fun and =0D the chance of winning an Apple iPod:=0D http://ads.sourceforge.net/cgi-bin/redirect.pl?thaw0031en=0D _______________________________________________=0D Sdcc-user mailing list=0D Sdcc-user@lists.sourceforge.net=0D https://lists.sourceforge.net/lists/listinfo/sdcc-user=0D =2E --------------Boundary-00=_EAZMLVC0000000000000 Content-Type: Text/HTML; charset="us-ascii" Content-Transfer-Encoding: quoted-printable =0D =0A
 
 
Actually, you need to AND the RD and PSEN lines to run
from xram.
 
 
-------Original Message-------<= /I>
 
From: sdcc-user@lists.sou= rceforge.net
Date: Wednes= day, March=20 12, 2003 12:25:15 AM
To: sdcc-user@lists.sou= rceforge.net
Subject: Re:= =20 [Sdcc-user] Designing a Dev Board For the 8051
 
On Tue, 11 Mar 2003, you wrote:
> I have dev= iced a=20 timing circuit for a 8051 running at
> 24Mhz. From my calcula= tions,=20 I believe each external ram
> instruction takes 250ns and my= =20 circuit takes

What version of the 8051 want you to use ?There=20 are big differenzes in the Timing.

For a generic 8051
!PSEN=20 goes low to fetch a Instuction.
!RD goes low to fetch xram via=20 movx.
!WR goes down to write xram via movx.
ALE triggers the= =20 latching of the high 8 addressbits transmitted on P0.

You ne= ed to=20 "or" RD and PSEN to execute Programms in Xram.

its better to= use=20 the 138 only for decodeing the Address to !CS
Then !RDor!PSEN ca= n drive=20 the !OE and !WR can drive RD/!WR from the Sram.

--
MFG=20 Gernot


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