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Transferring the controller from Keil C51

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Miroslav
2023-03-05
2023-08-11
  • Miroslav

    Miroslav - 2023-03-05

    Hi all
    Right now I'm using Keil C51 to compile the 8051 core which is inside the
    T5 microcontroller.
    I want to compile via SDCC. Tell me what should I do?
    I have such an archive that is copied to the root of keil uv 5

    https://www.sendspace.com/file/p17cnb

    • Miroslav
     
    • Benedikt Freisen

      In a nutshell, you have to identify Keil-specific features used by your code base and translate the respective parts to SDCC's syntax or – better still – use device/include/mcs51/compiler.h to create somewhat portable code.
      The main purpose of compiler.h is to abstract compiler differences away so that you can use the same code base with multiple compilers, going forward.
      You can take a look at that file and SDCC's manual for details.

       
  • Miroslav

    Miroslav - 2023-03-05

    Thanks for the answer.
    I studied the source code of the configuration file (.CDB).
    It looks like a regular 8051
    All I need is transfer these parameters to SDCC ?

    CPU=IRAM(0-0xFF)  CLOCK(24000000) MODC2 PMW DPC BSE MDU_R515
    MON=S8051.DLL TCore51.DLL("-pR8051XC")
    REGFILE=M5.h("DWIN")
    SFILE="LIB\STARTUP_M5.A51" ("M5 Startup Code")
    SIM=S8051.DLL DCore51.DLL("-pR8051XC")
    
     
    • Benedikt Freisen

      No, you will almost certainly have to alter the source code itself, too.
      Specifically, e.g. everything that tells the compiler to put something in a particular address space (like __data in SDCC) will have a slightly different notation.

       
      • Miroslav

        Miroslav - 2023-03-05

        I read about changing the code. There are no problems with this. Now I'm more concerned about setting parameters (CLOCK(24000000) MODC2 PMW DPC BSE MDU_R515, etc.). I'm still looking for documentation on this.

        UPD: Do I understand correctly that setting the processor frequency is needed only for debugging?
        Other directives (MODC2 PMW DPC BSE MDU_R515) are also not needed in SDCC?

         

        Last edit: Miroslav 2023-03-06
      • Miroslav

        Miroslav - 2023-03-06

        Unfortunately, I did not immediately notice the main page https://sdcc.sourceforge.net/ and the documentation that is there.
        I ported (described the registers) for this unusual (for me) 8051 T5 controller.
        However, the generated file does not run on my debug board.

        I would be grateful if you help me.
        This is just a sketch, so the code is not pretty https://www.sendspace.com/file/nvetts
        It works in Keil C51 UV5.

        I think it's in the compiler settings.

        Keil has the following settings:

        Memory Model Large variables in XDATA
        Code Rom Size: Large 64K
        Off-chip Xdata memory, Ram: Start:0x8000 Size:0x8000
        
        XDATA (X:0x8000-X:0xFFFF), HDATA (X:0x8000-X:0xFFFF))
        

        HDATA - what does this mean for SDCC?

        For SDCC I created a build.bat file

        sdcc --model-large --xram-loc 0x8000 --xram-size 0xFFFF --code-size 0x10000 -c T5LOS8051.c
        sdcc --model-large --xram-loc 0x8000 --xram-size 0xFFFF --code-size 0x10000 -c main.c
        sdcc --model-large --xram-loc 0x8000 --xram-size 0xFFFF --code-size 0x10000 main.rel T5LOS8051.rel
        
        rem ihx to hex
        packihx main.ihx > main.hex 
        
        rem hex to bin(or ihx to bin)
        srec_cat.exe *.hex -Intel -o T5L51.bin -Binary 
        

        There is a feature, srec_cat.exe issues:

        main.hex: 3: warning: data records not in strictly ascending order (expected >= 0x0062, got 0x0003)

        When compiling hex from Keil, there is no such warning.

        Keil also has STARTUP_M5.A51:

        $NOMOD51
        ; . . . .
        CSEG    AT  0F8H
        DB  0FFH,0FFH
        DB  'DWINT5'
        
        EXTRN CODE (?C_START)
        
        LJMP    ?C_START
        
        END
        

        How can I add this to SDCC?
        Unfortunately, I don't know how it works yet and I don't know assembler.

         

        Last edit: Miroslav 2023-03-06
        • Benedikt Freisen

          I cannot help you much with MCS-51 programming, but the combination --xram-loc 0x8000 --xram-size 0xFFFF looks a bit fishy to me, especially because it does not align with Off-chip Xdata memory, Ram: Start:0x8000 Size:0x8000.
          If the startup code from SDCC's own library is not sufficient, SDCC also has the __sdcc_external_startup mechanism (called _sdcc_external_startup until recently), where the startup code calls a function of that name if it is present.

           
  • Maarten Brock

    Maarten Brock - 2023-08-11

    The srec_cat warning is just that, a (very pedantic IMHO) warning. Srec_cat is perfectly capable of reordering the data. As long as it does not find overlapping data you should be fine.

    I don't know what HDATA is. Look it up in the Keil manual. But I doubt you will need it.

    You don't need to create the LJMP C_START.

    If you need those constant bytes in code memory you can use:

    __code const char __at(0x00F8) mycode[8] = 0xFF, 0xFF, 'D', 'W', 'I', 'N', 'T', '5';
    
     

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