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Programing the 68hc908ap

2006-06-08
2013-03-12
  • aamorgc@terra.es

    The next program for microcontroller 68hc908ap no run:

    ledpwm.c

    #include "mc68hc908ap.h"
    #include "pll.h"

    #define CLI _asm cli _endasm

    void rutina_desbordamiento_tim(void) interrupt 7
    {
        T1SC &= (~0x80);     //Desactiva interrupciones (~ complemento a 1)
        PTB ^= 0x10;        //Cambia estado PTD4 (^ or exclusivo)
    }

    void rutina_desbordamiento_ch0(void) interrupt 5
    {
        T1SC0 &= (~0x80);     //Desactiva interrupciones (~ complemento a 1)
        PTB  ^= 0x10;        //Cambia estado PTD4 (^ or exclusivo)
    }

    void main(void)
    {
            deshabilita_cop();
        inicializar_pll();

        DDRB4 = 1;             // Configura el pin PTB4 como salida
         PTB4  = 1;         // Pone a 1 el pin PTB4
       
        T1SC     = 0x76;     // Activa interrupciones
                             // Para contador
                             // Reincion contador y prescaler
                             // Prescaler: divide f.bus por 64
       
        T1MODH = 0x96;
        T1MODL = 0x00;
       
        T1SC0  = 0X50;
        T1CH0H = 0x0F;
        T1CH0L = 0x00;
       
        CLI;            // Actvia interrupciones
       
        T1SC &= (~0x20);     // Activa cuenta TIM
       
        for(;;);
    }

    pll.h

    void deshabilita_cop(void);
    void inicializar_pll(void);

    pll.c

    #include "mc68hc908ap.h"

    void deshabilita_cop(void){
        CONFIG1 |= 0x01;     // Deshabilita COP
    }

    void inicializar_pll(void)
    {
        //------------------------------------------------------------------
        // Configuracion para poder utilizar el puerto serie (en hex)
        // CGMVCLK    CGMPCLK    f.BUS         f.RCLK     R  N   P  E  L
        // 9.8304 MHz 9.8304 MHz 2.4576 MHz 32.768 kHz  1  12C 0  1  27
        //------------------------------------------------------------------
        //PLL Control Register    (PCTL)        (P)    (P)    (E)    (E)
        //Bit     7    6    5     4    3     2    1    0
        //    PLLIE     PLLF     PLLON     BCS     PRE1     PRE0     VPR1     VPR0
        //    0    0    0    0    0    0    0    1
        //------------------------------------------------------------------
        //PLL Bandwidth Control Register (PBWC)
        //Bit     7    6    5     4    3     2    1    0
        //     AUTO     LOCK     ACQ     0     0    0     0     R
        //    0    0    0    0    0    0    0    0
        //------------------------------------------------------------------
        //PLL Multiplier Select Registers (PMS)        (N)
        //Parte alta (PMSH)
        //Bit     7    6    5     4    3     2    1    0
        //    0     0     0     0     MUL11     MUL10     MUL9     MUL8
        //    0    0    0    0    0    0    0    1
        //Parte baja (PMSL)
        //Bit     7    6    5     4    3     2    1    0
        //    MUL7     MUL6     MUL5     MUL4     MUL3     MUL2     MUL1     MUL0
        //    0    0    1    0    1    1    0    0
        //------------------------------------------------------------------
        //PLL VCO Range Select Register (PMRS)    (L)
        //Bit     7    6    5     4    3     2    1    0
        //    VRS7     VRS6     VRS5     VRS4     VRS3     VRS2     VRS1     VRS0
        //    0    0    1    0    0    1    1    1
        //------------------------------------------------------------------
        //PLL Reference Divider Select Register (PMDS)    (R)
        //Bit     7    6    5     4    3     2    1    0
        //    0     0     0     0     RDS3     RDS2     RDS1     RDS0
        //    0    0    0    0    0    0    0    1  
        //------------------------------------------------------------------

        PCTL  = 0x00; // Desactivamos el PLL, PLLON = 0 en PCTL.
        VPR0  = 1;    // asigna P y E en PCTL.
        PMSL  = 0x2C; // Registro selector Alto del multiplicador del PLL
        PMSH  = 0x01; // Registro selector Bajo del multiplicador del PLL
                          // asigna N.
        PMRS  = 0x27; // Registro selector del rango VCO del PLL, asigna L
        PMDS  = 0x01; // Registro selector del divisor de referencia del PLL
                          // asigna R
        AUTO  = 1;    // Ponemos el PLL en modo automatico por hacer AUTO = 1 
                          // AUTO = 1 en PBWC.
        PLLON = 1;    // Activa el PLL en PCTL
       
        while(!(LOCK == 1)); // Espera a que se active el bit de LOCK en PBWC,
                          // lo que indica que la frecuenca generada es valida.
           
        BCS   = 1;    //Selecciona la frecuencia del VCO como salida del GCM
                  // BCS = 1 en PCTL.
    }

    mc69hc908ap.h

    /*-------------------------------------------------------------------------
      Declaracion de registros para el microcontrolador de Motorola
      MC68HC908AP
    -------------------------------------------------------------------------*/

    #ifndef _MC68HC908AP_H
      #define _MC68HC908AP_H

    #ifndef _UINT8
      #define _UINT8 unsigned char
    #endif

    #ifndef _UINT16
      #define _UINT16 unsigned int
    #endif

    #ifndef _VOLDATA
      #define _VOLDATA volatile data
    #endif

    #ifndef _VOLXDATA
      #define _VOLXDATA volatile xdata
    #endif

    struct __hc08_bits
    {
      unsigned int bit0:1;
      unsigned int bit1:1;
      unsigned int bit2:1;
      unsigned int bit3:1;
      unsigned int bit4:1;
      unsigned int bit5:1;
      unsigned int bit6:1;
      unsigned int bit7:1;
    };
     

    _VOLDATA _UINT8 at 0x00 PTA;     /* Registro de datos del puerto A */

    #define PORTA PTA           /* Alias para PTA                 */
      #define PTA0 ((struct __hc08_bits *)(&PTA))->bit0
      #define PTA1 ((struct __hc08_bits *)(&PTA))->bit1
      #define PTA2 ((struct __hc08_bits *)(&PTA))->bit2
      #define PTA3 ((struct __hc08_bits *)(&PTA))->bit3
      #define PTA4 ((struct __hc08_bits *)(&PTA))->bit4
      #define PTA5 ((struct __hc08_bits *)(&PTA))->bit5
      #define PTA6 ((struct __hc08_bits *)(&PTA))->bit6
      #define PTA7 ((struct __hc08_bits *)(&PTA))->bit7
       
    _VOLDATA _UINT8 at 0x01 PTB;     /* Registro de datos del puerto B */
    #define PORTB PTB                  /* Alias para PTB                 */   
      #define PTB0 ((struct __hc08_bits *)(&PTB))->bit0
      #define PTB1 ((struct __hc08_bits *)(&PTB))->bit1
      #define PTB2 ((struct __hc08_bits *)(&PTB))->bit2
      #define PTB3 ((struct __hc08_bits *)(&PTB))->bit3
      #define PTB4 ((struct __hc08_bits *)(&PTB))->bit4
      #define PTB5 ((struct __hc08_bits *)(&PTB))->bit5
      #define PTB6 ((struct __hc08_bits *)(&PTB))->bit6
      #define PTB7 ((struct __hc08_bits *)(&PTB))->bit7

    _VOLDATA _UINT8 at 0x02 PTC;     /* Registro de datos del puerto C */
    #define PORTC PTC                  /* Alias para PTB                 */   
      #define PTC0 ((struct __hc08_bits *)(&PTC))->bit0
      #define PTC1 ((struct __hc08_bits *)(&PTC))->bit1
      #define PTC2 ((struct __hc08_bits *)(&PTC))->bit2
      #define PTC3 ((struct __hc08_bits *)(&PTC))->bit3
      #define PTC4 ((struct __hc08_bits *)(&PTC))->bit4
      #define PTC5 ((struct __hc08_bits *)(&PTC))->bit5
      #define PTC6 ((struct __hc08_bits *)(&PTC))->bit6
      #define PTC7 ((struct __hc08_bits *)(&PTC))->bit7

    _VOLDATA _UINT8 at 0x03 PTD;     /* Registro de datos del puerto D */
    #define PORTD PTD                  /* Alias para PTD                 */
      #define PTD0 ((struct __hc08_bits *)(&PTD))->bit0
      #define PTD1 ((struct __hc08_bits *)(&PTD))->bit1
      #define PTD2 ((struct __hc08_bits *)(&PTD))->bit2
      #define PTD3 ((struct __hc08_bits *)(&PTD))->bit3
      #define PTD4 ((struct __hc08_bits *)(&PTD))->bit4
      #define PTD5 ((struct __hc08_bits *)(&PTD))->bit5
      #define PTD6 ((struct __hc08_bits *)(&PTD))->bit6
      #define PTD7 ((struct __hc08_bits *)(&PTD))->bit7

    _VOLDATA _UINT8 at 0x04 DDRA; /* Registro de direccion de datos A  */
      #define DDRA0 ((struct __hc08_bits *)(&DDRA))->bit0
      #define DDRA1 ((struct __hc08_bits *)(&DDRA))->bit1
      #define DDRA2 ((struct __hc08_bits *)(&DDRA))->bit2
      #define DDRA3 ((struct __hc08_bits *)(&DDRA))->bit3
      #define DDRA4 ((struct __hc08_bits *)(&DDRA))->bit4
      #define DDRA5 ((struct __hc08_bits *)(&DDRA))->bit5
      #define DDRA6 ((struct __hc08_bits *)(&DDRA))->bit6
      #define DDRA7 ((struct __hc08_bits *)(&DDRA))->bit7

    _VOLDATA _UINT8 at 0x05 DDRB;     /* Registro de direccion de datos B */
      #define DDRB0 ((struct __hc08_bits *)(&DDRB))->bit0
      #define DDRB1 ((struct __hc08_bits *)(&DDRB))->bit1
      #define DDRB2 ((struct __hc08_bits *)(&DDRB))->bit2
      #define DDRB3 ((struct __hc08_bits *)(&DDRB))->bit3
      #define DDRB4 ((struct __hc08_bits *)(&DDRB))->bit4
      #define DDRB5 ((struct __hc08_bits *)(&DDRB))->bit5
      #define DDRB6 ((struct __hc08_bits *)(&DDRB))->bit6
      #define DDRB7 ((struct __hc08_bits *)(&DDRB))->bit7

    _VOLDATA _UINT8 at 0x06 DDRC;     /* Registro de direccion de datos C */
      #define DDRC0 ((struct __hc08_bits *)(&DDRC))->bit0
      #define DDRC1 ((struct __hc08_bits *)(&DDRC))->bit1
      #define DDRC2 ((struct __hc08_bits *)(&DDRC))->bit2
      #define DDRC3 ((struct __hc08_bits *)(&DDRC))->bit3
      #define DDRC4 ((struct __hc08_bits *)(&DDRC))->bit4
      #define DDRC5 ((struct __hc08_bits *)(&DDRC))->bit5
      #define DDRC6 ((struct __hc08_bits *)(&DDRC))->bit6
      #define DDRC7 ((struct __hc08_bits *)(&DDRC))->bit7

    _VOLDATA _UINT8 at 0x07 DDRD;     /* Registro de direccion de datos D */
      #define DDRD0 ((struct __hc08_bits *)(&DDRD))->bit0
      #define DDRD1 ((struct __hc08_bits *)(&DDRD))->bit1
      #define DDRD2 ((struct __hc08_bits *)(&DDRD))->bit2
      #define DDRD3 ((struct __hc08_bits *)(&DDRD))->bit3
      #define DDRD4 ((struct __hc08_bits *)(&DDRD))->bit4
      #define DDRD5 ((struct __hc08_bits *)(&DDRD))->bit5
      #define DDRD6 ((struct __hc08_bits *)(&DDRD))->bit6
      #define DDRD7 ((struct __hc08_bits *)(&DDRD))->bit7

    _VOLDATA _UINT8 at 0x0C LEDA;  /* Registro de control LED del puerto A */
      #define LEDA0 ((struct __hc08_bits *)(&LEDA))->bit0
      #define LEDA1 ((struct __hc08_bits *)(&LEDA))->bit1   
      #define LEDA2 ((struct __hc08_bits *)(&LEDA))->bit2
      #define LEDA3 ((struct __hc08_bits *)(&LEDA))->bit3   
      #define LEDA4 ((struct __hc08_bits *)(&LEDA))->bit4
      #define LEDA5 ((struct __hc08_bits *)(&LEDA))->bit5   
      #define LEDA6 ((struct __hc08_bits *)(&LEDA))->bit6
      #define LEDA7 ((struct __hc08_bits *)(&LEDA))->bit7       
           
    _VOLDATA _UINT8 at 0x10 SPCR;  /* Registro de control SPI */
      #define SPTIE  ((struct __hc08_bits *)(&SPCR))->bit0
      #define SPE    ((struct __hc08_bits *)(&SPCR))->bit1   
      #define SPWOM  ((struct __hc08_bits *)(&SPCR))->bit2
      #define CPHA   ((struct __hc08_bits *)(&SPCR))->bit3   
      #define CPOL   ((struct __hc08_bits *)(&SPCR))->bit4
      #define SPMSTR ((struct __hc08_bits *)(&SPCR))->bit5   
      #define R      ((struct __hc08_bits *)(&SPCR))->bit6
      #define SPRIE  ((struct __hc08_bits *)(&SPCR))->bit7       

    _VOLDATA _UINT8 at 0x11 SPSCR;  /* Registro de control y estado SPI */
      #define SPR0   ((struct __hc08_bits *)(&SPSCR))->bit0
      #define SPR1   ((struct __hc08_bits *)(&SPSCR))->bit1   
      #define MODFEN ((struct __hc08_bits *)(&SPSCR))->bit2
      #define SPTE   ((struct __hc08_bits *)(&SPSCR))->bit3   
      #define MODF   ((struct __hc08_bits *)(&SPSCR))->bit4
      #define OVRF   ((struct __hc08_bits *)(&SPSCR))->bit5   
      #define ERRIE  ((struct __hc08_bits *)(&SPSCR))->bit6
      #define SPRF   ((struct __hc08_bits *)(&SPSCR))->bit7       

    _VOLDATA _UINT8 at 0x12 SPDR;  /* Registro de datos del SPI */
      #define R0    ((struct __hc08_bits *)(&SPDR))->bit0
      #define R1    ((struct __hc08_bits *)(&SPDR))->bit1   
      #define R2    ((struct __hc08_bits *)(&SPDR))->bit2
      #define R3    ((struct __hc08_bits *)(&SPDR))->bit3   
      #define R4    ((struct __hc08_bits *)(&SPDR))->bit4
      #define R5    ((struct __hc08_bits *)(&SPDR))->bit5   
      #define R6    ((struct __hc08_bits *)(&SPDR))->bit6
      #define R7    ((struct __hc08_bits *)(&SPDR))->bit7       

    _VOLDATA _UINT8 at 0x13 SCC1;  /* Registro de control 1 del SCI */
      #define SCIPTY   ((struct __hc08_bits *)(&SCC1))->bit0
      #define SCIPEN   ((struct __hc08_bits *)(&SCC1))->bit1   
      #define SCIILTY  ((struct __hc08_bits *)(&SCC1))->bit2
      #define SCIWAKE  ((struct __hc08_bits *)(&SCC1))->bit3   
      #define SCIM     ((struct __hc08_bits *)(&SCC1))->bit4
      #define SCITXINV ((struct __hc08_bits *)(&SCC1))->bit5   
      #define SCIENSCI ((struct __hc08_bits *)(&SCC1))->bit6
      #define SCILOOPS ((struct __hc08_bits *)(&SCC1))->bit7       

    _VOLDATA _UINT8 at 0x14 SCC2;  /* Registro de control 2 del SCI */
      #define SCISBK   ((struct __hc08_bits *)(&SCC2))->bit0
      #define SCIRWU   ((struct __hc08_bits *)(&SCC2))->bit1   
      #define SCIRE    ((struct __hc08_bits *)(&SCC2))->bit2
      #define SCITE    ((struct __hc08_bits *)(&SCC2))->bit3   
      #define SCIILIE  ((struct __hc08_bits *)(&SCC2))->bit4
      #define SCISCRIE ((struct __hc08_bits *)(&SCC2))->bit5   
      #define SCITCIE  ((struct __hc08_bits *)(&SCC2))->bit6
      #define SCISCTIE ((struct __hc08_bits *)(&SCC2))->bit7       

    _VOLDATA _UINT8 at 0x15 SCC3;  /* Registro de control 3 del SCI */
      #define SCIPEIE  ((struct __hc08_bits *)(&SCC3))->bit0
      #define SCIFEIE  ((struct __hc08_bits *)(&SCC3))->bit1   
      #define SCINEIE  ((struct __hc08_bits *)(&SCC3))->bit2
      #define SCIORIE  ((struct __hc08_bits *)(&SCC3))->bit3   
      #define SCIDMATE ((struct __hc08_bits *)(&SCC3))->bit4
      #define SCIDMARE ((struct __hc08_bits *)(&SCC3))->bit5   
      #define SCIT8    ((struct __hc08_bits *)(&SCC3))->bit6
      #define SCIR8    ((struct __hc08_bits *)(&SCC3))->bit7       

    _VOLDATA _UINT8 at 0x16 SCS1;  /* Registro de estado 1 del SCI */
      #define SCIPE    ((struct __hc08_bits *)(&SCS1))->bit0
      #define SCIFE    ((struct __hc08_bits *)(&SCS1))->bit1   
      #define SCINF    ((struct __hc08_bits *)(&SCS1))->bit2
      #define SCIOR    ((struct __hc08_bits *)(&SCS1))->bit3   
      #define SCIIDLE  ((struct __hc08_bits *)(&SCS1))->bit4
      #define SCISCRF  ((struct __hc08_bits *)(&SCS1))->bit5   
      #define SCITC    ((struct __hc08_bits *)(&SCS1))->bit6
      #define SCISCTE  ((struct __hc08_bits *)(&SCS1))->bit7       

    _VOLDATA _UINT8 at 0x17 SCS2;  /* Registro de estado 2 del SCI */
      #define SCIBKF   ((struct __hc08_bits *)(&SCS2))->bit0
      #define SCIRPF   ((struct __hc08_bits *)(&SCS2))->bit1   

    _VOLDATA _UINT8 at 0x18 SCDR;  /* Registro de datos del SCI */
      #define SCIRT0    ((struct __hc08_bits *)(&SCDR))->bit0
      #define SCIRT1    ((struct __hc08_bits *)(&SCDR))->bit1   
      #define SCIRT2    ((struct __hc08_bits *)(&SCDR))->bit2
      #define SCIRT3    ((struct __hc08_bits *)(&SCDR))->bit3   
      #define SCIRT4    ((struct __hc08_bits *)(&SCDR))->bit4
      #define SCIRT5    ((struct __hc08_bits *)(&SCDR))->bit5   
      #define SCIRT6    ((struct __hc08_bits *)(&SCDR))->bit6
      #define SCIRT7    ((struct __hc08_bits *)(&SCDR))->bit7       

    _VOLDATA _UINT8 at 0x19 SCBR;  /* Registro de velocidad en baudios del SCI */
      #define SCR0   ((struct __hc08_bits *)(&SCBR))->bit0
      #define SCR1   ((struct __hc08_bits *)(&SCBR))->bit1   
      #define SCR2   ((struct __hc08_bits *)(&SCBR))->bit2
      #define SCP0   ((struct __hc08_bits *)(&SCBR))->bit4
      #define SCP1   ((struct __hc08_bits *)(&SCBR))->bit5   

    _VOLDATA _UINT8 at 0x1A KBSCR; /* Registro de estado y control del teclado */
      #define MODE   ((struct __hc08_bits *)(&KBSCR))->bit0
      #define IMASK  ((struct __hc08_bits *)(&KBSCR))->bit1
      #define ACK    ((struct __hc08_bits *)(&KBSCR))->bit2
      #define KEY    ((struct __hc08_bits *)(&KBSCR))->bit3
           
    _VOLDATA _UINT8 at 0x1B KBIER; /* Registro de habilitacion de interrupciones del teclado */
      #define KBIE0  ((struct __hc08_bits *)(&KBIER))->bit0
      #define KBIE1  ((struct __hc08_bits *)(&KBIER))->bit1
      #define KBIE2  ((struct __hc08_bits *)(&KBIER))->bit2
      #define KBIE3  ((struct __hc08_bits *)(&KBIER))->bit3
      #define KBIE4  ((struct __hc08_bits *)(&KBIER))->bit4
      #define KBIE5  ((struct __hc08_bits *)(&KBIER))->bit5
      #define KBIE6  ((struct __hc08_bits *)(&KBIER))->bit6
      #define KBIE7  ((struct __hc08_bits *)(&KBIER))->bit7

    _VOLDATA _UINT8 at 0x1C INTSCR2; /* Registro de estado y control IRQ2 */
      #define MODE2   ((struct __hc08_bits *)(&INTSCR2))->bit0
      #define IMASK2  ((struct __hc08_bits *)(&INTSCR2))->bit1
      #define ACK2    ((struct __hc08_bits *)(&INTSCR2))->bit2
      #define IRQ2F   ((struct __hc08_bits *)(&INTSCR2))->bit3
      #define PUC0ENB ((struct __hc08_bits *)(&INTSCR2))->bit6

    _VOLDATA _UINT8 at 0x1D CONFIG2; /* Registro de configuracion 2 */
    /* CONFIG2 registro escribible solo una vez por reset */   

    _VOLDATA _UINT8 at 0x1E INTSCR1; /* Registro de estado y control IRQ1 */
      #define MODE1   ((struct __hc08_bits *)(&INTSCR1))->bit0
      #define IMASK1  ((struct __hc08_bits *)(&INTSCR1))->bit1
      #define ACK1    ((struct __hc08_bits *)(&INTSCR1))->bit2
      #define IRQ1F   ((struct __hc08_bits *)(&INTSCR1))->bit3

    _VOLDATA _UINT8 at 0x1F CONFIG1; /* Registro de configuracion 1 */
    /* CONFIG1 registro escribible solo una vez por reset */   

    _VOLDATA _UINT8 at 0x20 T1SC;     /* Registro de estado y control del TIM 1*/
      #define TIM1PS0   ((struct __hc08_bits *)(&T1SC))->bit0
      #define TIM1PS1   ((struct __hc08_bits *)(&T1SC))->bit1
      #define TIM1PS2   ((struct __hc08_bits *)(&T1SC))->bit2
      #define TIM1TRST  ((struct __hc08_bits *)(&T1SC))->bit4
      #define TIM1TSTOP ((struct __hc08_bits *)(&T1SC))->bit5
      #define TIM1TOIE  ((struct __hc08_bits *)(&T1SC))->bit6
      #define TIM1TOF   ((struct __hc08_bits *)(&T1SC))->bit7   

    _VOLDATA _UINT16 at 0x21 T1CNT;    /* Registros alto y bajo del contador del TIM 1*/
    _VOLDATA _UINT8  at 0x21 T1CNTH;   /* Registro alto del contador del TIM 1*/
    _VOLDATA _UINT8  at 0x22 T1CNTL;   /* Registro bajo del contador del TIM 1*/

    _VOLDATA _UINT16 at 0x23 T1MOD;    /* Registros alto y bajo del modulo contador del TIM 1*/
    _VOLDATA _UINT8  at 0x23 T1MODH;   /* Registro alto del modulo contador del TIM 1*/
    _VOLDATA _UINT8  at 0x24 T1MODL;   /* Registro bajo del modulo contador del TIM 1*/

    _VOLDATA _UINT8 at 0x25 T1SC0;    /* Registro de estado y control del canal 0 del TIM 1*/
      #define TIM1CH0MAX ((struct __hc08_bits *)(&T1SC0))->bit0
      #define TIM1TOV0   ((struct __hc08_bits *)(&T1SC0))->bit1
      #define TIM1ELS0A  ((struct __hc08_bits *)(&T1SC0))->bit2
      #define TIM1ELS0B  ((struct __hc08_bits *)(&T1SC0))->bit3
      #define TIM1MS0A   ((struct __hc08_bits *)(&T1SC0))->bit4
      #define TIM1MS0B   ((struct __hc08_bits *)(&T1SC0))->bit5
      #define TIM1CH0IE  ((struct __hc08_bits *)(&T1SC0))->bit6
      #define TIM1CH0F   ((struct __hc08_bits *)(&T1SC0))->bit7

    _VOLDATA _UINT16 at 0x26 T1CH0;   /* Registros alto y bajo del canal 0 del TIM1 1*/
    _VOLDATA _UINT8  at 0x26 T1CH0H;   /* Registro alto del canal 0 del TIM 1*/
    _VOLDATA _UINT8  at 0x27 T1CH0L;   /* Registro bajo del canal 0 del TIM 1*/

    _VOLDATA _UINT8 at 0x28 T1SC1;    /* Registros de estado y control del canal 1 del TIM 1*/
      #define TIM1CH1MAX ((struct __hc08_bits *)(&T1SC1))->bit0
      #define TIM1TOV1   ((struct __hc08_bits *)(&T1SC1))->bit1
      #define TIM1ELS1A  ((struct __hc08_bits *)(&T1SC1))->bit2
      #define TIM1ELS1B  ((struct __hc08_bits *)(&T1SC1))->bit3
      #define TIM1MS1A   ((struct __hc08_bits *)(&T1SC1))->bit4
      #define TIM1CH1IE  ((struct __hc08_bits *)(&T1SC1))->bit6
      #define TIM1CH1F   ((struct __hc08_bits *)(&T1SC1))->bit7

    _VOLDATA _UINT16 at 0x29 T1CH1;    /* Registros alto y bajo del canal 1 del TIM 1*/
    _VOLDATA _UINT8  at 0x29 T1CH1H;  /* Registro alto del canal 1 del TIM 1*/
    _VOLDATA _UINT8  at 0x2A T1CH1L;  /* Registro bajo del canal 1 del TIM 1*/

    _VOLDATA _UINT8 at 0x2B T2SC;     /* Registro de estado y control del TIM 2*/
      #define TIM2PS0   ((struct __hc08_bits *)(&T2SC))->bit0
      #define TIM2PS1   ((struct __hc08_bits *)(&T2SC))->bit1
      #define TIM2PS2   ((struct __hc08_bits *)(&T2SC))->bit2
      #define TIM2TRST  ((struct __hc08_bits *)(&T2SC))->bit4
      #define TIM2TSTOP ((struct __hc08_bits *)(&T2SC))->bit5
      #define TIM2TOIE  ((struct __hc08_bits *)(&T2SC))->bit6
      #define TIM2TOF   ((struct __hc08_bits *)(&T2SC))->bit7   

    _VOLDATA _UINT16 at 0x2C T2CNT;    /* Registros alto y bajo del contador del TIM 2*/
    _VOLDATA _UINT8  at 0x2C T2CNTH;   /* Registro alto del contador del TIM 2*/
    _VOLDATA _UINT8  at 0x2D T2CNTL;   /* Registro bajo del contador del TIM 2*/

    _VOLDATA _UINT16 at 0x2E T2MOD;    /* Registros alto y bajo del modulo contador del TIM 2*/
    _VOLDATA _UINT8  at 0x2E T2MODH;   /* Registro alto del modulo contador del TIM 2*/
    _VOLDATA _UINT8  at 0x2F T2MODL;   /* Registro bajo del modulo contador del TIM 2*/

    _VOLDATA _UINT8 at 0x30 T2SC0;    /* Registro de estado y control del canal 0 del TIM 2*/
      #define TIM2CH0MAX ((struct __hc08_bits *)(&T2SC0))->bit0
      #define TIM2TOV0   ((struct __hc08_bits *)(&T2SC0))->bit1
      #define TIM2ELS0A  ((struct __hc08_bits *)(&T2SC0))->bit2
      #define TIM2ELS0B  ((struct __hc08_bits *)(&T2SC0))->bit3
      #define TIM2MS0A   ((struct __hc08_bits *)(&T2SC0))->bit4
      #define TIM2MS0B   ((struct __hc08_bits *)(&T2SC0))->bit5
      #define TIM2CH0IE  ((struct __hc08_bits *)(&T2SC0))->bit6
      #define TIM2CH0F   ((struct __hc08_bits *)(&T2SC0))->bit7

    _VOLDATA _UINT16 at 0x31 T2CH0;   /* Registros alto y bajo del canal 0 del TIM1 2*/
    _VOLDATA _UINT8  at 0x31 T2CH0H;   /* Registro alto del canal 0 del TIM 2*/
    _VOLDATA _UINT8  at 0x32 T2CH0L;   /* Registro bajo del canal 0 del TIM 2*/

    _VOLDATA _UINT8 at 0x33 T2SC1;    /* Registros de estado y control del canal 1 del TIM 2*/
      #define TIM2CH1MAX ((struct __hc08_bits *)(&T2SC1))->bit0
      #define TIM2TOV1   ((struct __hc08_bits *)(&T2SC1))->bit1
      #define TIM2ELS1A  ((struct __hc08_bits *)(&T2SC1))->bit2
      #define TIM2ELS1B  ((struct __hc08_bits *)(&T2SC1))->bit3
      #define TIM2MS1A   ((struct __hc08_bits *)(&T2SC1))->bit4
      #define TIM2CH1IE  ((struct __hc08_bits *)(&T2SC1))->bit6
      #define TIM2CH1F   ((struct __hc08_bits *)(&T2SC1))->bit7

    _VOLDATA _UINT16 at 0x34 T2CH1;   /* Registros alto y bajo del canal 1 del TIM 2*/
    _VOLDATA _UINT8  at 0x34 T2CH1H;  /* Registro alto del canal 1 del TIM 2*/
    _VOLDATA _UINT8  at 0x35 T2CH1L;  /* Registro bajo del canal 1 del TIM 2*/

    _VOLDATA _UINT8 at 0x36 PCTL;     /* Registro de Control del PLL*/
      #define VPR0   ((struct __hc08_bits *)(&PCTL))->bit0
      #define VPR1   ((struct __hc08_bits *)(&PCTL))->bit1
      #define PRE0   ((struct __hc08_bits *)(&PCTL))->bit2
      #define PRE1   ((struct __hc08_bits *)(&PCTL))->bit3
      #define BCS    ((struct __hc08_bits *)(&PCTL))->bit4
      #define PLLON  ((struct __hc08_bits *)(&PCTL))->bit5
      #define PLLF   ((struct __hc08_bits *)(&PCTL))->bit6
      #define PLLIE  ((struct __hc08_bits *)(&PCTL))->bit7

    _VOLDATA _UINT8 at 0x37 PBWC;     /* Registro de Control del ancho de banda del PLL*/
      #define ACQ    ((struct __hc08_bits *)(&PBWC))->bit5
      #define LOCK   ((struct __hc08_bits *)(&PBWC))->bit6
      #define AUTO   ((struct __hc08_bits *)(&PBWC))->bit7

    _VOLDATA _UINT8 at 0x38 PMSH;     /* Registro de seleccion del multiplicador alto del PLL*/
      #define MUL8   ((struct __hc08_bits *)(&PMSH))->bit0
      #define MUL9   ((struct __hc08_bits *)(&PMSH))->bit1
      #define MUL10  ((struct __hc08_bits *)(&PMSH))->bit2
      #define MUL11  ((struct __hc08_bits *)(&PMSH))->bit3

    _VOLDATA _UINT8 at 0x39 PMSL;     /* Registro de seleccion del multiplicador bajo del PLL*/
      #define MUL0   ((struct __hc08_bits *)(&PMSL))->bit0
      #define MUL1   ((struct __hc08_bits *)(&PMSL))->bit1
      #define MUL2   ((struct __hc08_bits *)(&PMSL))->bit2
      #define MUL3   ((struct __hc08_bits *)(&PMSL))->bit3
      #define MUL4   ((struct __hc08_bits *)(&PMSL))->bit4
      #define MUL5   ((struct __hc08_bits *)(&PMSL))->bit5
      #define MUL6   ((struct __hc08_bits *)(&PMSL))->bit6
      #define MUL7   ((struct __hc08_bits *)(&PMSL))->bit7

    _VOLDATA _UINT8 at 0x3A PMRS;     /* Registro de seleccion del rango VCO del PLL*/
      #define VRS0   ((struct __hc08_bits *)(&PMRS))->bit0
      #define VRS1   ((struct __hc08_bits *)(&PMRS))->bit1
      #define VRS2   ((struct __hc08_bits *)(&PMRS))->bit2
      #define VRS3   ((struct __hc08_bits *)(&PMRS))->bit3
      #define VRS4   ((struct __hc08_bits *)(&PMRS))->bit4
      #define VRS5   ((struct __hc08_bits *)(&PMRS))->bit5
      #define VRS6   ((struct __hc08_bits *)(&PMRS))->bit6
      #define VRS7   ((struct __hc08_bits *)(&PMRS))->bit7

    _VOLDATA _UINT8 at 0x3B PMDS;     /* Registro de seleccion del divisor de referencia PLL*/
      #define RDS0   ((struct __hc08_bits *)(&PMDS))->bit0
      #define RDS1   ((struct __hc08_bits *)(&PMDS))->bit1
      #define RDS2   ((struct __hc08_bits *)(&PMDS))->bit2
      #define RDS3   ((struct __hc08_bits *)(&PMDS))->bit3

    _VOLDATA _UINT8 at 0x40 IRSCC1;     /* Registro de control 1 del IRSCI*/
      #define IRSCIPTY    ((struct __hc08_bits *)(&IRSCC1))->bit0
      #define IRSCIPEN    ((struct __hc08_bits *)(&IRSCC1))->bit1
      #define IRSCIILTY   ((struct __hc08_bits *)(&IRSCC1))->bit2
      #define IRSCIWAKE   ((struct __hc08_bits *)(&IRSCC1))->bit3
      #define IRSCIM      ((struct __hc08_bits *)(&IRSCC1))->bit4
      #define IRSCIENSCI  ((struct __hc08_bits *)(&IRSCC1))->bit6
      #define IRSCILOOPS  ((struct __hc08_bits *)(&IRSCC1))->bit7

    _VOLDATA _UINT8 at 0x41 IRSCC2;     /* Registro de control 2 del IRSCI*/
      #define IRSCISBK    ((struct __hc08_bits *)(&IRSCC2))->bit0
      #define IRSCIRWU    ((struct __hc08_bits *)(&IRSCC2))->bit1
      #define IRSCIRE     ((struct __hc08_bits *)(&IRSCC2))->bit2
      #define IRSCITE     ((struct __hc08_bits *)(&IRSCC2))->bit3
      #define IRSCIILIE   ((struct __hc08_bits *)(&IRSCC2))->bit4
      #define IRSCISCRIE  ((struct __hc08_bits *)(&IRSCC2))->bit5
      #define IRSCITCIE   ((struct __hc08_bits *)(&IRSCC2))->bit6
      #define IRSCISCTIE  ((struct __hc08_bits *)(&IRSCC2))->bit7

    _VOLDATA _UINT8 at 0x42 IRSCC3;     /* Registro de control 3 del IRSCI*/
      #define IRSCIPEIE    ((struct __hc08_bits *)(&IRSCC3))->bit0
      #define IRSCIFEIE    ((struct __hc08_bits *)(&IRSCC3))->bit1
      #define IRSCINEIE    ((struct __hc08_bits *)(&IRSCC3))->bit2
      #define IRSCIORIE    ((struct __hc08_bits *)(&IRSCC3))->bit3
      #define IRSCIDMATE   ((struct __hc08_bits *)(&IRSCC3))->bit4
      #define IRSCIDMARE   ((struct __hc08_bits *)(&IRSCC3))->bit5
      #define IRSCIT8      ((struct __hc08_bits *)(&IRSCC3))->bit6
      #define IRSCIR8      ((struct __hc08_bits *)(&IRSCC3))->bit7

    _VOLDATA _UINT8 at 0x43 IRSCS1;     /* Registro de estado 1 del IRSCI*/
      #define IRSCIPE     ((struct __hc08_bits *)(&IRSCS1))->bit0
      #define IRSCIFE     ((struct __hc08_bits *)(&IRSCS1))->bit1
      #define IRSCINF     ((struct __hc08_bits *)(&IRSCS1))->bit2
      #define IRSCIOR     ((struct __hc08_bits *)(&IRSCS1))->bit3
      #define IRSCIIDLE   ((struct __hc08_bits *)(&IRSCS1))->bit4
      #define IRSCISCRF   ((struct __hc08_bits *)(&IRSCS1))->bit5
      #define IRSCITC     ((struct __hc08_bits *)(&IRSCS1))->bit6
      #define IRSCISCTE   ((struct __hc08_bits *)(&IRSCS1))->bit7

    _VOLDATA _UINT8 at 0x44 IRSCS2;     /* Registro de estado 2 del IRSCI*/
      #define IRSCIRPF    ((struct __hc08_bits *)(&IRSCS2))->bit0
      #define IRSCIBKF    ((struct __hc08_bits *)(&IRSCS2))->bit1

    _VOLDATA _UINT8 at 0x45 IRSCDR;     /* Registro de datos IRSCI*/
      #define IRSCIRT0    ((struct __hc08_bits *)(&IRSCDR))->bit0
      #define IRSCIRT1    ((struct __hc08_bits *)(&IRSCDR))->bit1
      #define IRSCIRT2    ((struct __hc08_bits *)(&IRSCDR))->bit2
      #define IRSCIRT3    ((struct __hc08_bits *)(&IRSCDR))->bit3
      #define IRSCIRT4    ((struct __hc08_bits *)(&IRSCDR))->bit4
      #define IRSCIRT5    ((struct __hc08_bits *)(&IRSCDR))->bit5
      #define IRSCIRT6    ((struct __hc08_bits *)(&IRSCDR))->bit6
      #define IRSCIRT7    ((struct __hc08_bits *)(&IRSCDR))->bit7

    _VOLDATA _UINT8 at 0x46 IRSCBR;     /* Registro de velocidad en baudios del IRSCI*/
      #define IRSCISCR0   ((struct __hc08_bits *)(&IRSCBR))->bit0
      #define IRSCISCR1   ((struct __hc08_bits *)(&IRSCBR))->bit1
      #define IRSCISCR2   ((struct __hc08_bits *)(&IRSCBR))->bit2
      #define IRSCISCR3   ((struct __hc08_bits *)(&IRSCBR))->bit3
      #define IRSCISCR4   ((struct __hc08_bits *)(&IRSCBR))->bit4
      #define IRSCISCR5   ((struct __hc08_bits *)(&IRSCBR))->bit5
      #define IRSCISCR6   ((struct __hc08_bits *)(&IRSCBR))->bit6
      #define IRSCISCR7   ((struct __hc08_bits *)(&IRSCBR))->bit7

    _VOLDATA _UINT8 at 0x47 IRSCIRCR;     /* Registro de control de infrarojos del IRSCI*/
      #define IREN   ((struct __hc08_bits *)(&IRSCIRCR))->bit0
      #define TNP0   ((struct __hc08_bits *)(&IRSCIRCR))->bit1
      #define TNP1   ((struct __hc08_bits *)(&IRSCIRCR))->bit2

    _VOLDATA _UINT8 at 0x48 MMADR;     /* Registro de direccion del MMIIC*/
      #define MMEXTAD ((struct __hc08_bits *)(&MMADR))->bit0
      #define MMAD1   ((struct __hc08_bits *)(&MMADR))->bit1
      #define MMAD2   ((struct __hc08_bits *)(&MMADR))->bit2
      #define MMAD3   ((struct __hc08_bits *)(&MMADR))->bit3
      #define MMAD4   ((struct __hc08_bits *)(&MMADR))->bit4
      #define MMAD5   ((struct __hc08_bits *)(&MMADR))->bit5
      #define MMAD6   ((struct __hc08_bits *)(&MMADR))->bit6
      #define MMAD7   ((struct __hc08_bits *)(&MMADR))->bit7

    _VOLDATA _UINT8 at 0x49 MMCR1;     /* Registro de control 1 del MMIIC*/
      #define MMCRCBYTE ((struct __hc08_bits *)(&MMCR1))->bit1
      #define REPSEN    ((struct __hc08_bits *)(&MMCR1))->bit2
      #define MMTXAK    ((struct __hc08_bits *)(&MMCR1))->bit3
      #define MMCLRBB   ((struct __hc08_bits *)(&MMCR1))->bit5
      #define MMIEN     ((struct __hc08_bits *)(&MMCR1))->bit6
      #define MMEN      ((struct __hc08_bits *)(&MMCR1))->bit7

    _VOLDATA _UINT8 at 0x4A MMCR2;     /* Registro de control 2 del MMIIC*/
      #define MMCRCEF ((struct __hc08_bits *)(&MMCR2))->bit0
      #define MMRW    ((struct __hc08_bits *)(&MMCR2))->bit3
      #define MMAST   ((struct __hc08_bits *)(&MMCR2))->bit4
      #define MMBB    ((struct __hc08_bits *)(&MMCR2))->bit5
      #define MMNAKIF ((struct __hc08_bits *)(&MMCR2))->bit6
      #define MMALIF  ((struct __hc08_bits *)(&MMCR2))->bit7

    _VOLDATA _UINT8 at 0x4B MMSR;     /* Registro de estado del MMIIC*/
      #define MMRXBF  ((struct __hc08_bits *)(&MMSR))->bit0
      #define MMTXBE  ((struct __hc08_bits *)(&MMSR))->bit1
      #define MMCRCBF ((struct __hc08_bits *)(&MMSR))->bit2
      #define MMRXAK  ((struct __hc08_bits *)(&MMSR))->bit3
      #define MMSRW   ((struct __hc08_bits *)(&MMSR))->bit4
      #define MMATCH  ((struct __hc08_bits *)(&MMSR))->bit5
      #define MMTXIF  ((struct __hc08_bits *)(&MMSR))->bit6
      #define MMRXIF  ((struct __hc08_bits *)(&MMSR))->bit7

    _VOLDATA _UINT8 at 0x4C MMDTR;     /* Registro del transmisor de datos del MMIIC*/
      #define MMTD0   ((struct __hc08_bits *)(&MMDTR))->bit0
      #define MMTD1   ((struct __hc08_bits *)(&MMDTR))->bit1
      #define MMTD2   ((struct __hc08_bits *)(&MMDTR))->bit2
      #define MMTD3   ((struct __hc08_bits *)(&MMDTR))->bit3
      #define MMTD4   ((struct __hc08_bits *)(&MMDTR))->bit4
      #define MMTD5   ((struct __hc08_bits *)(&MMDTR))->bit5
      #define MMTD6   ((struct __hc08_bits *)(&MMDTR))->bit6
      #define MMTD7   ((struct __hc08_bits *)(&MMDTR))->bit7

    _VOLDATA _UINT8 at 0x4D MMDRR;     /* Registro del receptor de datos del MMIIC*/
      #define MMRD0   ((struct __hc08_bits *)(&MMDRR))->bit0
      #define MMRD1   ((struct __hc08_bits *)(&MMDRR))->bit1
      #define MMRD2   ((struct __hc08_bits *)(&MMDRR))->bit2
      #define MMRD3   ((struct __hc08_bits *)(&MMDRR))->bit3
      #define MMRD4   ((struct __hc08_bits *)(&MMDRR))->bit4
      #define MMRD5   ((struct __hc08_bits *)(&MMDRR))->bit5
      #define MMRD6   ((struct __hc08_bits *)(&MMDRR))->bit6
      #define MMRD7   ((struct __hc08_bits *)(&MMDRR))->bit7

    _VOLDATA _UINT8 at 0x4E MMCRDR;     /* Registro de datos del CRC del MMIIC*/
      #define MMCRCD0 ((struct __hc08_bits *)(&MMCRDR))->bit0
      #define MMCRCD1 ((struct __hc08_bits *)(&MMCRDR))->bit1
      #define MMCRCD2 ((struct __hc08_bits *)(&MMCRDR))->bit2
      #define MMCRCD3 ((struct __hc08_bits *)(&MMCRDR))->bit3
      #define MMCRCD4 ((struct __hc08_bits *)(&MMCRDR))->bit4
      #define MMCRCD5 ((struct __hc08_bits *)(&MMCRDR))->bit5
      #define MMCRCD6 ((struct __hc08_bits *)(&MMCRDR))->bit6
      #define MMCRCD7 ((struct __hc08_bits *)(&MMCRDR))->bit7

    _VOLDATA _UINT8 at 0x4F MMFDR;     /* Registro divisor de frecuencia del MMIIC*/
      #define MMBR0   ((struct __hc08_bits *)(&MMFDR))->bit0
      #define MMBR1   ((struct __hc08_bits *)(&MMFDR))->bit1
      #define MMBR2   ((struct __hc08_bits *)(&MMFDR))->bit2

    _VOLDATA _UINT8 at 0x51 TBCR;     /* Registro de control de tiempo base*/
      #define TBON    ((struct __hc08_bits *)(&TBCR))->bit1
      #define TBIE    ((struct __hc08_bits *)(&TBCR))->bit2
      #define TACK    ((struct __hc08_bits *)(&TBCR))->bit3
      #define TBR0    ((struct __hc08_bits *)(&TBCR))->bit4
      #define TBR1    ((struct __hc08_bits *)(&TBCR))->bit5
      #define TBR2    ((struct __hc08_bits *)(&TBCR))->bit6
      #define TBIF    ((struct __hc08_bits *)(&TBCR))->bit7

    _VOLDATA _UINT8 at 0x57 ADSCR; /* Registros de estado y control del ADC */
      #define ADCH0 ((struct __hc08_bits *)(&ADSCR))->bit0
      #define ADCH1 ((struct __hc08_bits *)(&ADSCR))->bit1
      #define ADCH2 ((struct __hc08_bits *)(&ADSCR))->bit2
      #define ADCH3 ((struct __hc08_bits *)(&ADSCR))->bit3
      #define ADCH4 ((struct __hc08_bits *)(&ADSCR))->bit4
      #define ADCO  ((struct __hc08_bits *)(&ADSCR))->bit5
      #define AIEN  ((struct __hc08_bits *)(&ADSCR))->bit6
      #define COCO  ((struct __hc08_bits *)(&ADSCR))->bit7

    _VOLDATA _UINT8 at 0x58 ADICLK; /* Registros de control del reloj del ADC */
      #define MODE0  ((struct __hc08_bits *)(&ADICLK))->bit2
      #define MODE1A ((struct __hc08_bits *)(&ADICLK))->bit3
      #define ADICLK ((struct __hc08_bits *)(&ADICLK))->bit4
      #define ADIV0  ((struct __hc08_bits *)(&ADICLK))->bit5
      #define ADIV1  ((struct __hc08_bits *)(&ADICLK))->bit6
      #define ADIV2  ((struct __hc08_bits *)(&ADICLK))->bit7
       
    _VOLDATA _UINT8 at 0x59 ADRH0;   /* Registro de datos alto del ADC 0 */

    _VOLDATA _UINT8 at 0x5A ADRL0;   /* Registro de datos bajo del ADC 0 */

    _VOLDATA _UINT8 at 0x5B ADRL1;   /* Registro de datos bajo del ADC 1 */

    _VOLDATA _UINT8 at 0x5C ADRL2;   /* Registro de datos bajo del ADC 2 */

    _VOLDATA _UINT8 at 0x5D ADRL3;   /* Registro de datos bajo del ADC 3 */

    _VOLDATA _UINT8 at 0x5E ADASCR; /* Registros de control de autoscan del ADC */
      #define ASCAN  ((struct __hc08_bits *)(&ADASCR))->bit0
      #define AUTO0  ((struct __hc08_bits *)(&ADASCR))->bit1
      #define AUTO1  ((struct __hc08_bits *)(&ADASCR))->bit2

    _VOLXDATA _UINT8 at 0xFE00 SBSR;    /* Registro del estado de Break SIM */
      #define SBSW ((struct __hc08_bits *)(&SBSR))->bit1

    _VOLXDATA _UINT8 at 0xFE01 SRSR;    /* Registro del estado de Reset SIM */
      #define LVI    ((struct __hc08_bits *)(&SRSR))->bit1
      #define MODRST ((struct __hc08_bits *)(&SRSR))->bit2
      #define ILAD   ((struct __hc08_bits *)(&SRSR))->bit3
      #define ILOP   ((struct __hc08_bits *)(&SRSR))->bit4
      #define COP    ((struct __hc08_bits *)(&SRSR))->bit5
      #define PIN    ((struct __hc08_bits *)(&SRSR))->bit6
      #define POR    ((struct __hc08_bits *)(&SRSR))->bit7

    _VOLXDATA _UINT8 at 0xFE03 SBFCR;    /* Registro de control de banderas Break SIM */
      #define BCFE  ((struct __hc08_bits *)(&SBFCR))->bit7

    _VOLXDATA _UINT8 at 0xFE04 INT1;    /* Registro de estado de interrupcones 1 */
      #define IF1  ((struct __hc08_bits *)(&INT1))->bit2
      #define IF2  ((struct __hc08_bits *)(&INT1))->bit3
      #define IF3  ((struct __hc08_bits *)(&INT1))->bit4
      #define IF4  ((struct __hc08_bits *)(&INT1))->bit5
      #define IF5  ((struct __hc08_bits *)(&INT1))->bit6
      #define IF6  ((struct __hc08_bits *)(&INT1))->bit7
       
    _VOLXDATA _UINT8 at 0xFE05 INT2;  /* Registro de estado de interrupciones 2 */
      #define IF7  ((struct __hc08_bits *)(&INT2))->bit0
      #define IF8  ((struct __hc08_bits *)(&INT2))->bit1
      #define IF9  ((struct __hc08_bits *)(&INT2))->bit2
      #define IF10 ((struct __hc08_bits *)(&INT2))->bit3
      #define IF11 ((struct __hc08_bits *)(&INT2))->bit4
      #define IF12 ((struct __hc08_bits *)(&INT2))->bit5
      #define IF13 ((struct __hc08_bits *)(&INT2))->bit6
      #define IF14 ((struct __hc08_bits *)(&INT2))->bit7

    _VOLXDATA _UINT8 at 0xFE06 INT3;  /* Registro de estado de interrupciones 3 */
      #define IF15 ((struct __hc08_bits *)(&INT3))->bit0
      #define IF16 ((struct __hc08_bits *)(&INT3))->bit1
      #define IF17 ((struct __hc08_bits *)(&INT3))->bit2
      #define IF18 ((struct __hc08_bits *)(&INT3))->bit3
      #define IF19 ((struct __hc08_bits *)(&INT3))->bit4
      #define IF20 ((struct __hc08_bits *)(&INT3))->bit5
      #define IF21 ((struct __hc08_bits *)(&INT3))->bit6

    _VOLXDATA _UINT8 at 0xFE08 FLCR;    /* Registro de control de la FLASH */
      #define PGM   ((struct __hc08_bits *)(&FLCR))->bit0
      #define ERASE ((struct __hc08_bits *)(&FLCR))->bit1
      #define MASS  ((struct __hc08_bits *)(&FLCR))->bit2
      #define HVEN  ((struct __hc08_bits *)(&FLCR))->bit3
           
    _VOLXDATA _UINT8 at 0xFE09 FLBPR;    /* Registro de proteccion de bloque Flash */
      #define BPR0 ((struct __hc08_bits *)(&FLBPR))->bit0
      #define BPR1 ((struct __hc08_bits *)(&FLBPR))->bit1
      #define BPR2 ((struct __hc08_bits *)(&FLBPR))->bit2
      #define BPR3 ((struct __hc08_bits *)(&FLBPR))->bit3
      #define BPR4 ((struct __hc08_bits *)(&FLBPR))->bit4
      #define BPR5 ((struct __hc08_bits *)(&FLBPR))->bit5
      #define BPR6 ((struct __hc08_bits *)(&FLBPR))->bit6
      #define BPR7 ((struct __hc08_bits *)(&FLBPR))->bit7

    _VOLXDATA _UINT16 at 0xFE0C BRK;    /* Registro alto y bajo de direccion Break */
    _VOLXDATA _UINT8  at 0xFE0C BRKH;    /* Registro alto de direccion Break */
    _VOLXDATA _UINT8  at 0xFE0D BRKL;    /* Registro bajo de direccion Break */   

    _VOLXDATA _UINT8  at 0xFE0E BRKSCR;  /* Registro de estado y control del Break */
      #define BRKA ((struct __hc08_bits *)(&BRKSCR))->bit6
      #define BRKE ((struct __hc08_bits *)(&BRKSCR))->bit7   

    _VOLXDATA _UINT8  at 0xFE0F LVISR;  /* Registro de estado LVI */
      #define LVIOUT ((struct __hc08_bits *)(&LVISR))->bit7

    _VOLXDATA _UINT8  at 0xFECF MOR;  /* Registro de opcion de mascar */
      #define OSCSEL0 ((struct __hc08_bits *)(&MOR))->bit6
      #define OSCSEL1 ((struct __hc08_bits *)(&MOR))->bit7   
       
    _VOLXDATA _UINT8  at 0xFFFF COPCTL;  /* Registro de control del COP */

    #endif

    makefile

    #***************************************************************************
    # Fichero makefile.
    #***************************************************************************

    #-- Compilador
    CC = sdcc
    CFLAGS = -mhc08 --stack-loc 0x045F --code-loc 0x0860

    #-- Proramas
    ledpwm.S19: ledpwm.c pll.rel 
        $(CC) $(CFLAGS) $^

    clean:
          rm -f *.o *.rel *.S19 *.sym *.lst *.map *.lnk    *.rst *.mem *.asm *~

    %.rel : %.c %.h
        $(CC) $(CFLAGS) -c $<

    *************************************************

    where be the problem???

    Thank.

    Alex.

     
    • Raphael Neider

      Raphael Neider - 2006-06-08

      That's an intersting approach: Posting 38K of code without a hint whatsoever as to what the problem is (compiler output? functionality on hardware? ever tried to reduce the code to a kind'a blinky?)...

      Good luck finding someone with a lot of time to spare to debug your code,
      Raphael

       
    • kosmonaut_pirx

      kosmonaut_pirx - 2006-06-08

      yes, very interesting task :)

      much too long. i guess no one is interested in hc08 register description.
      maybe another hint: program language is english, spain (?) comments are just disturbing reading code. If comments, please in english or even take them out.

      an idea for your program: disabling watchdog should be done before main. As it is said in
      http://sdcc.sourceforge.net/doc/sdccman.html/node75.html
      so please keep reading.
      else without problem description solutions are hard to tell.

       
    • aamorgc@terra.es

      The code for ledpwm.c use the TIM and the channel 0 for generate a pwm signal for switch un led in PTB4 .
      The code for pll.c initialize el pll and run fine.

      My problem is even though the code looks fine no run. I think in a problen of SDCC or makefile. The progran is little although the hc08 register description take up enough.

      thank.

       
    • kosmonaut_pirx

      kosmonaut_pirx - 2006-06-09

      i don't think it's a sdcc issue. your program is quite simple for that.
      you still haven't said, whats happening or whats not happening and what you expected to happen by your program. the code seems ok at first sight. are you sure interrupts are fired? give some more informations, or no one is able nor willing to help you.

       
    • aamorgc@terra.es

      The question is that if looks fine why no run. It has that switch a led and no switch. All looks correct.

      Thank.

       
    • kosmonaut_pirx

      kosmonaut_pirx - 2006-06-09

      maybe led switches this fast you can't see it?

      but anyway, sorry have to say this, but you're not a great help at all. you're not answering questions. you just keep saying "it doesn't run" without more explanations. so if you're not interested in the solution of your problem, why should anyone else spend his time?
      it's just annoying me.

       

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