[41cb42] by Nikodemus Siivola
faster FIND and POSITION on bit-vectors
Read data a word at a time for efficiency's sake.
Could do even better with VOPs, but this already wins hugely on sparse
This also makes constraint propagation in sparse universes a bit less sucky.
[14bf77] by Alastair Bridgewater
Fix control stack scavenging for dynamic-extent allocation.
* Non-CONS objects on the control stack can cause... problems
[aab1cd] by Alastair Bridgewater
Move control-stack scavenging to gc-common.c.
* Instead of having slightly-divergent copies of the control
[5b73de] by Alastair Bridgewater
tests: Raw instances shouldn't stack-allocate on most targets.
* We possibly should be testing to make sure that they /do/
[4b19ef] by Alastair Bridgewater , pushed by Alastair Bridgewater
DX structs with raw slots only allowed on conservative gencgc.
* Unless the control stack is conservatively scavenged, any
* Thus, all unboxed data must be stored on the number stack
* All INSTANCE objects have a boxed slot, the LAYOUT slot.
* And none of this applies if the stack is conservatively
[6753b5] by Alastair Bridgewater
Fix build on non-GENCGC targets.
* Commit 8ee61a7761181511d15690246eb52d100e233935 introduced a
[de6d4c] by Lutz Euler
x86: Better disassembly of segment-prefixes.
Thanks to Alastair Bridgewater who originally provided these changes
* Establish a SEG prefix for segment overrides similar
* Have the SEG prefilter set an instruction property
* Alter PRINT-MEM-ACCESS to output a suitable prefix
I have abstracted out the segment prefix printing into the new function
Here is an example to show the difference in disassembler output:
; 0E6: 64 FS-SEGMENT-PREFIX
; 0E6: 648910 MOV FS:[EAX], EDX
[65bdee] by Lutz Euler
Improve handling of x86[-64] prefix instructions in the disassembler.
Make LOCK, REP, REX and #x66 true prefix instructions on x86[-64].
Delete the scores of instruction formats and printer clauses that are
An example of the changes in the disassembler output (on x86-64):
; 5FFC: F0 LOCK
; 4C: F0480FB171F9 LOCK CMPXCHG [RCX-7], RSI
[b83ac6] by Lutz Euler
Corrections to disassembly of SHLD, SHRD and LEA on x86[-64].
The double shifts were wrongly matching the bit pattern of some CMOV
Also, on x86-64, one of the printers for LEA was missing a WIDTH field
[4d7a5b] by Lutz Euler
Make some disassembler parameters effectual.
In the context of changing the treatment of prefix instructions in the
Correct the calculation of the DSTATE's ARGUMENT-COLUMN which is
Don't emit instruction bytes when *DISASSEM-INST-COLUMN-WIDTH* is 0.
Whitespace correction in ALIGNMENT-HOOK.
Playing with these two parameters allows to select different disassembly
; E11: L7: 4881FB17001020 CMP RBX, 537919511
(setf SB-DISASSEM::*DISASSEM-INST-COLUMN-WIDTH* 0)
; E11: L7: CMP RBX, 537919511
(setf SB-DISASSEM:*DISASSEM-OPCODE-COLUMN-WIDTH* 8)
; E11: L7: CMP RBX, 537919511
[eb53f2] by Lutz Euler
Make the disassembler understand instruction prefixes.
Instructions having NIL as their printer are treated as prefixes,
This commit only provides the infrastructure; its impact is currently
The motivation for this change comes from x86[-64]: One goal is to make
Extend the existing beginnings of support for prefix instructions in
Abstract out the filling of the column containing the instruction bytes
Clean up whitespace and improve line breaks.
[d7e55b] by Paul Khuong
Fix EQL constraint propagation on constant assigned closure variables
* Constant lvars can now be references to assigned-to closure-
Reported by Eric Marsden on sbcl-devel.
* Also, canonicalize whitespace in dynamic-extent tests.
[8a33bf] by Nikodemus Siivola
protect against read-time package-lock circumvention from LOCKED::(BAR)
Instead of binding *PACKAGE*, bind *READER-PACKAGE* which only
[0e49d7] by Nikodemus Siivola
remove etags as a build-time dependency
Do try to build TAGS by default, but if etags isn't there, don't
[b69fe4] by Joshua Elsasser
Fix clisp-hosted build.