I've just (finally...) released a modified version of openwince-jtag, with a new "ejtag" bus driver. Tested RTL8181, and a little (read-only for now): RTL8186, ADM5120 and AR2312. See here:
but it's experimental so be careful - try it only on bricked boxes ;)
The cable I used is compatible with Xilinx DLC5, with a 74HC541 buffer
inside (simple passive cable with only resistors didn't work for me),
as described in the nice WRT54G unbricking guide by hairydairymaid.
Keep it short (no more than 50 cm or so), and use a PCI parallel port
for speed (it still takes about 30 minutes to read whole 2M flash,
and a few minutes to write a 24K bootloader).
Hope this helps,
Marek
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Anonymous
-
2006-01-04
Hello! Could you post a link for a diagram of the interface you have used? There are many diferent interfaces and I don't know wich to use. Or just post the link for that guide by hairydairymaid, I can't find it.
I also have a problem compiling your modified openwince-jtag. I successfully installed "include-0.4.2" doing configure/make/make install as allways, but when I try to compile jtag I get this error:
Then I noticed in the includes that this file '/usr/local/include/openwince/brux/flash.h' had:
void detectflash( bus_t *bus, uint32_t adr );
I changed it to:
void detectflash( bus_t *bus );
And then I was able to compile successfully and install.
Thanks!
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Anonymous
-
2006-01-04
I was wrong! I downloaded several jtag versions and I wasn't compiling your modified version LOL
After editing '/usr/local/include/openwince/brux/flash.h' back to 'void detectflash( bus_t *bus, uint32_t adr );' I get another error trying to do 'make' in your modified jtag version:
if gcc -DHAVE_CONFIG_H -I. -I. -I.. -DLOCALEDIR=\"/usr/local/share/locale\" -I/usr/local/include/openwince -I/usr/local/include/openwince/device -I/usr/local/include/openwince/arm -I.. -I../include -g -O2 -Wall -MT flash.o -MD -MP -MF ".deps/flash.Tpo" -c -o flash.o flash.c; \
then mv -f ".deps/flash.Tpo" ".deps/flash.Po"; else rm -f ".deps/flash.Tpo"; exit 1; fi
flash.c:67: error: the static declaration of ‘flash_driver’ below a non static
../include/flash.h:31: error: the previus declaration of ‘flash_driver’ was here
make[3]: *** [flash.o] Error 1
make[3]: Leaving directory `/home/eneko/compilaciones/jtag-0.6-cvs-20051228/src'
make[2]: *** [all-recursive] Error 1
make[2]: Leaving directory `/home/eneko/compilaciones/jtag-0.6-cvs-20051228/src'
make[1]: *** [all-recursive] Error 1
make[1]: Leaving directory `/home/eneko/compilaciones/jtag-0.6-cvs-20051228'
make: *** [all] Error 2
I've translated the text because I use an spanish linux. Whats now the problem?
Thank you!
I have founded the schematic for the Parallel Cable III (DLC 5) [1]. It is based in 2 74HC125. May be you cable is easier to build.
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Anonymous
-
2006-01-05
As you told by email, the problem was that the program was not looking at 'flash.h' in the includes installed. Changing the file '/src/flash.c' in line 46 from:
#include "flash.h"
to:
#include <brux/flash.h>
solved the problem.
Now I'm going to build the JTAG cable. I hope I can read my RTL8186 (C54BRS4 router), and soon write to it so I can safely play with it :)
Thanks!
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I have a bricked ovislink 1120 I'll try to ressurect thanks to your guide. But I've got a question: you say that after finishing with JTAG we should remove R17. Why? Can't it be left in place, just in case?
Thanks.
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Finally I was able to unbrick my Ovislink 1120.
I used the simple resistive JTAG cable (hairydairymaid based, 40cm) and your modified openwince-jtag and it worked great!!!
I uploaded the bootloader (v3.2, compiled with the realtek sdk 1.6) and now the board is working again.
Thanks a lot !!!
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I have OvisLink 5460 bricked.
Can u please help me building jtag adapter?
Which one to use, and where to connect it on board (should i find be ohm-meter where pins on chips lead?). How did you uploaded bootloader, with what commands?
Any help will be good, thanks.
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@Marcus Salles
Can u give us some more details about your procedure? Where did you connect TMS, TCK, TDI, TDO and GND to, can u see in datasheet what are right names for pins on chip please?
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I just bought parts for http://www.amelek.gda.pl/rtl8181/jtag/wiggler.gif, i got some questions. 25-pin LPT, on that scheme, is it watched from front side, or from back side where soldering should be? http://sta.c64.org/legend.html here is standard show from back side, so i am confused, i believe on wiggler scheme is front side?
Why is 1K resistor connected with dots, not straight line, and where PC_VCC from pin 9 of LPT goes?
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The cable I used is the unbuffered one, simply resistive. Its schematic can be found here: http://www.ranvik.net/prosjekter-privat/jtag_for_wrt54g_og_wrt54gs/HairyDairyMaid_WRT54G_v22.pdf
Another thing you have to know is if the pins on your device are open collector type. If so, you i'll probably have to add pull-up or pull-down resistors.
Visit www.hardwarebook.net and search for LPT and you'll understand the pinout of the LPT port better.
I can help you but I need to know what you already know..
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I am ok with LPT now.
I tried with that cable earlyer, and debricked Linksys WRT54g, that was easy.
Now my main problem is where to connect outputs to board, TMS, TCK, TDI, TDO and GND. That is why i asked where you connected them, so i can look in datasheet to find on rtl8186.
In jtag tools, what was your procedure? Did you set cable first like this: cable parallel 0x378 DLC5 or cable ppdev /dev/parport1 DLC5? After that goes detect? What next? ( I will be lucky if i get to detect to work).
Thanks for reply
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
I've just (finally...) released a modified version of openwince-jtag, with a new "ejtag" bus driver. Tested RTL8181, and a little (read-only for now): RTL8186, ADM5120 and AR2312. See here:
http://www.amelek.gda.pl/rtl8181/jtag/
but it's experimental so be careful - try it only on bricked boxes ;)
The cable I used is compatible with Xilinx DLC5, with a 74HC541 buffer
inside (simple passive cable with only resistors didn't work for me),
as described in the nice WRT54G unbricking guide by hairydairymaid.
Keep it short (no more than 50 cm or so), and use a PCI parallel port
for speed (it still takes about 30 minutes to read whole 2M flash,
and a few minutes to write a 24K bootloader).
Hope this helps,
Marek
Hello! Could you post a link for a diagram of the interface you have used? There are many diferent interfaces and I don't know wich to use. Or just post the link for that guide by hairydairymaid, I can't find it.
I also have a problem compiling your modified openwince-jtag. I successfully installed "include-0.4.2" doing configure/make/make install as allways, but when I try to compile jtag I get this error:
make[4]: Leaving directory `/home/eneko/compilaciones/jtag-0.5.1/libbrux/po'
make[4]: Entering directory `/home/eneko/compilaciones/jtag-0.5.1/libbrux'
if gcc -DHAVE_CONFIG_H -I. -I. -I. -I/usr/local/include/openwince -I/usr/local/include/openwince/device -I/usr/local/include/openwince/arm -I./../include -g -O2 -Wall -MT cmd_detectflash.o -MD -MP -MF ".deps/cmd_detectflash.Tpo" \ -c -o cmd_detectflash.o `test -f 'cmd/cmd_detectflash.c' || echo './'`cmd/cmd_detectflash.c; \ then mv -f ".deps/cmd_detectflash.Tpo" ".deps/cmd_detectflash.Po"; \ else rm -f ".deps/cmd_detectflash.Tpo"; exit 1; \ fi
cmd/cmd_detectflash.c: In function ‘cmd_detectflash_run’:
cmd/cmd_detectflash.c:43: error: too few arguments to function ‘detectflash’
make[4]: *** [cmd_detectflash.o] Error 1
make[4]: Leaving directory `/home/eneko/compilaciones/jtag-0.5.1/libbrux'
make[3]: *** [all-recursive] Error 1
make[3]: Leaving directory `/home/eneko/compilaciones/jtag-0.5.1/libbrux'
make[2]: *** [all] Error 2
make[2]: Leaving directory `/home/eneko/compilaciones/jtag-0.5.1/libbrux'
make[1]: *** [all-recursive] Error 1
make[1]: Leaving directory `/home/eneko/compilaciones/jtag-0.5.1'
make: *** [all] Error 2
Then I noticed in the includes that this file '/usr/local/include/openwince/brux/flash.h' had:
void detectflash( bus_t *bus, uint32_t adr );
I changed it to:
void detectflash( bus_t *bus );
And then I was able to compile successfully and install.
Thanks!
I was wrong! I downloaded several jtag versions and I wasn't compiling your modified version LOL
After editing '/usr/local/include/openwince/brux/flash.h' back to 'void detectflash( bus_t *bus, uint32_t adr );' I get another error trying to do 'make' in your modified jtag version:
if gcc -DHAVE_CONFIG_H -I. -I. -I.. -DLOCALEDIR=\"/usr/local/share/locale\" -I/usr/local/include/openwince -I/usr/local/include/openwince/device -I/usr/local/include/openwince/arm -I.. -I../include -g -O2 -Wall -MT flash.o -MD -MP -MF ".deps/flash.Tpo" -c -o flash.o flash.c; \ then mv -f ".deps/flash.Tpo" ".deps/flash.Po"; else rm -f ".deps/flash.Tpo"; exit 1; fi
flash.c:67: error: the static declaration of ‘flash_driver’ below a non static
../include/flash.h:31: error: the previus declaration of ‘flash_driver’ was here
make[3]: *** [flash.o] Error 1
make[3]: Leaving directory `/home/eneko/compilaciones/jtag-0.6-cvs-20051228/src'
make[2]: *** [all-recursive] Error 1
make[2]: Leaving directory `/home/eneko/compilaciones/jtag-0.6-cvs-20051228/src'
make[1]: *** [all-recursive] Error 1
make[1]: Leaving directory `/home/eneko/compilaciones/jtag-0.6-cvs-20051228'
make: *** [all] Error 2
I've translated the text because I use an spanish linux. Whats now the problem?
Thank you!
I have founded the schematic for the Parallel Cable III (DLC 5) [1]. It is based in 2 74HC125. May be you cable is easier to build.
[1] http://toolbox.xilinx.com/docsan/xilinx4/data/docs/pac/appendixb.html
As you told by email, the problem was that the program was not looking at 'flash.h' in the includes installed. Changing the file '/src/flash.c' in line 46 from:
#include "flash.h"
to:
#include <brux/flash.h>
solved the problem.
Now I'm going to build the JTAG cable. I hope I can read my RTL8186 (C54BRS4 router), and soon write to it so I can safely play with it :)
Thanks!
I have a bricked ovislink 1120 I'll try to ressurect thanks to your guide. But I've got a question: you say that after finishing with JTAG we should remove R17. Why? Can't it be left in place, just in case?
Thanks.
Finally I was able to unbrick my Ovislink 1120.
I used the simple resistive JTAG cable (hairydairymaid based, 40cm) and your modified openwince-jtag and it worked great!!!
I uploaded the bootloader (v3.2, compiled with the realtek sdk 1.6) and now the board is working again.
Thanks a lot !!!
I have OvisLink 5460 bricked.
Can u please help me building jtag adapter?
Which one to use, and where to connect it on board (should i find be ohm-meter where pins on chips lead?). How did you uploaded bootloader, with what commands?
Any help will be good, thanks.
@Marcus Salles
Can u give us some more details about your procedure? Where did you connect TMS, TCK, TDI, TDO and GND to, can u see in datasheet what are right names for pins on chip please?
I just bought parts for http://www.amelek.gda.pl/rtl8181/jtag/wiggler.gif, i got some questions. 25-pin LPT, on that scheme, is it watched from front side, or from back side where soldering should be? http://sta.c64.org/legend.html here is standard show from back side, so i am confused, i believe on wiggler scheme is front side?
Why is 1K resistor connected with dots, not straight line, and where PC_VCC from pin 9 of LPT goes?
Hi somiknight,
The cable I used is the unbuffered one, simply resistive. Its schematic can be found here:
http://www.ranvik.net/prosjekter-privat/jtag_for_wrt54g_og_wrt54gs/HairyDairyMaid_WRT54G_v22.pdf
Another thing you have to know is if the pins on your device are open collector type. If so, you i'll probably have to add pull-up or pull-down resistors.
Visit www.hardwarebook.net and search for LPT and you'll understand the pinout of the LPT port better.
I can help you but I need to know what you already know..
I am ok with LPT now.
I tried with that cable earlyer, and debricked Linksys WRT54g, that was easy.
Now my main problem is where to connect outputs to board, TMS, TCK, TDI, TDO and GND. That is why i asked where you connected them, so i can look in datasheet to find on rtl8186.
In jtag tools, what was your procedure? Did you set cable first like this: cable parallel 0x378 DLC5 or cable ppdev /dev/parport1 DLC5? After that goes detect? What next? ( I will be lucky if i get to detect to work).
Thanks for reply
I forgot to write, i dont understand that thing about open collector and resistors...