Re: [quirks-uvm-devel] query on quirks examples

[Sergei L. <sl...@is...>]

Hi.

Bhavani Malladi wrote:

>>Date: Thu, 28 Mar 2002 14:00:09 -0800 (PST)
>>From: bhavmus m <bh...@ya...>
>>Subject: query on quirks examples
>>To: qui...@li...
>>
>>
>>Hi,
>>
>>      I have got the following questions after going
>>through the simple example.
>>
>>
>>1. usage of fp[0], fp[1] is little bit confusing. I
>>am thinking these are the procedure parameters and
>>can be used for procedure INPUT or OUTPUT
>>
Yes. All input/output of procedure or function can be done through `fp' 
selector.
But you can see that this selector is not defined inside this procedure.
The reason is that every procedure is generic and got real fp descriptor 
before making
instantion.

>>
>>2. why can not we declare the ct value in the 
>>fact.ua file? 
>>
Becouse a procedure is a generic entity.
Now in this procedure static int32 type is used for all registers.

lv is <int32 int32 stu>

In future will be possible write something like this:

lv is <fp[0] fp[1] stu>
(or lv is fp descriptor)

in this case we will not have any predefined type in the procedure
and use types of passed values. We can switch from int32 type for
int64 type or ever multiply precision type without changing the code.
But in this case we cann't define any constants inside the function.

I agree , for some cases we can implement simpler model. It is needed
think about it. Have you any ideas?

>>
>>3. I am able to understand the declaration of
>>registers, but not the actual mapping done below.
>> map is
>>  (auMul[1], lv[1])  (auMul[0], fp[0])   (auMul[2],
>>fp[1])
>> end map;
>>
The mapping syntax at present stage is very ugly. We need improve it.
For example:

auMul (fp[0], lv[1], fp[1])

Let's unroll it as:

fp1 = fp[0] * lv[1]  (according to the input/output modes of auMul 
declaration - [in in out])

In the case of [out in in] it will be:

fp[0] = fp[1] / lv[1]

It is that we have in Prolog or Mercury.
Such definition besides of all gives a hint for code generator.

>>
>>4. I want to have some more explanation for *act
>>command.
>>
The answer is in "Quirks UVM architecture overview". I will be very 
appreciate
if you help me make it more readable and understandable :) Find the section
about mapping and act command and let's talk about unclear places in it.

By the way, the example I send to you contain only one map.
This example in benchmarks  is more accurate (with two maps).

>>
>>5. I have gone through the fibonacci example too. it
>>is easy compared to factorial. In this example also
>>I did n't get the
>>purpose of mapping lv[3] twice.
>>
auInc is <int32/out int32/in>

it is reverseable form, thus we can restore original value if we make 
the same but in reverse:

auInc is <int32/in int32/out>

There are some cases when it is useful (for example compare

dec ax
call foo
inc ax
...

and

mov bx, ax
dec ax
call foo
mov ax,bx

(i.e. , we can undo this instruction)

 But you can define

auInc is int32/inout;

and use this form with only one channel.

>> Why do we need auSum
>>register, even though we have the actual result in
>>lv[2]?
>>
auSum it is not register becouse it is entity without memory.

Try use simple rule: in any mapping relation can be only one real register,
i.e. an entity which store values. auSum[2] is only adder output.
We can have a lot of input/outputs attached to one memory register
(but no many registers attached to one channel).

>>
>>procedure :Fibonacci is
>> lv is <int32/inout int32/inout int32/inout
>>int32/inout stu>;
>>
>> declare map
>>    auInc is <int32/out int32/in stu>;
>>    auSum is <int32/in int32/in int32/out stu>;
>> map is
>>  (lv[3],auInc[0])
>>  (lv[3],auInc[1])
>>  (lv[0],auSum[0])
>>  (lv[1],auSum[1])
>>  (lv[2],auSum[2])
>> end map;
>>begin
>> lv[3] <- fp[0];
>> lv[0] <- ct[0];
>> lv[1] <- ct[1];
>>
>> loop
>>    * auInc;
>>     lv[0] <- lv[1];
>>    lv[1] <- lv[2];
>> until not lv[3];
>>
>> fp[1] <- lv[2];
>>
>>end :Fibonacci;
>>
>>
>> 
>>
>> 
>>
>>procedure :fact is
>> -- Make two 32 bit local registers.
>> -- Each register is both writeable and readable.
>> lv is <int32/inout int32/inout stu>;
>> 
>> declare map
>>  -- Get access to two registers of
>>incrementer/decrementer
>>  auInc is <int32/out int32/in stu>;
>>
>>  -- Make two virtual registers (they are simple
>>"ports"
>>  -- and now they are attached to nothing).
>>  dx1 is <int32/in int32/out stu>;
>>  
>>  -- Three ports of multiplier
>>  auMul is <int32/in int32/in int32/out stu>;
>> map is
>>  -- Attach fp[0] (it is the first of registers -
>>parameters
>>  -- of this procedure) to the input register of
>>incr/decr.
>>  -- The output register of incr/decr attach to the
>>first local
>>  -- register.
>>  (auInc[0], lv[0])  (auInc[1], fp[0])
>>
>>  -- The first local register will contain n-1,
>>  -- the second one will contain the result of
>>recursive call.
>>  (lv[0], dx1[0])    (lv[1], dx1[1])
>>
>>  -- This attach the output of our multiplier (n *
>>fact (n-1))
>>  -- to fp[1]. Really fp[x] it is either a memory
>>cell
>>  -- in the caller stack or a register if our
>>optimizer is 
>>  -- a lassie. It is why it is named "secondary (or
>>virtual)"
>>  -- selector. Any virtual register is like a
>>deference.
>>  (auMul[1], lv[1])  (auMul[0], fp[0])   (auMul[2],
>>fp[1])
>> end map;
>>begin
>> if fp[0] then
>>  -- It is imperfection of current machine - we need
>>  -- awake decrementor to make its outputs updated.
>>  * auInc;
>>
>>  -- dx1 will be substituted by fp when th procedure
>>calls.
>>  -- Theses lv and dx1 will not be able to access
>>there.
>>  call dx1, :fact;
>>
>>  -- Synchronize impuls to multiplier
>>  * auMul;
>> else
>>  -- This branch is for the case of fact(0) = 1.
>>  -- Moves '1' into a register which is "hided"
>>behind
>>  -- the virtual fp[1].
>>  fp[1] <- ct[0];
>> end if;
>>
>>end :fact;
>>
>
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