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The Verilog-A dynamic-loader has been merged into master. Please test
and report issues/bugs. Patches are welcome!
For basic usage please refer to slides 48-53 in:
A few more details about the implementation can be found at:
There are a few other things I would like to see implemented. They are
I wish I had more time to test it further, but so far it seems pretty
You can inspect the commit messages with:
`git log db932..e42464`
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