Update of /cvsroot/pyxida/Pyxida/sim
In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv24280
Modified Files:
Makefile vs.cc
Log Message:
added signal handling to vivaldi simulator to allow for unbounded runs that can be stopped after looking at the log file (untested)
Index: vs.cc
===================================================================
RCS file: /cvsroot/pyxida/Pyxida/sim/vs.cc,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** vs.cc 15 Mar 2007 12:20:50 -0000 1.1
--- vs.cc 19 Dec 2008 19:00:52 -0000 1.2
***************
*** 4,9 ****
--- 4,17 ----
*/
+ // For ctrl-c
+ #include <stdio.h>
+ #include <unistd.h>
+ #include <signal.h>
+
#include "node.h"
+ int stamp = 0;
+ int ROUNDS = 0;
+ bool shutdown = false;
int **neighbors;
int neighborCount;
***************
*** 87,90 ****
--- 95,105 ----
}
+ void exit_program(int sig) {
+ printf("Caught signal: %d\n", sig);
+ shutdown = true;
+ (void) signal(SIGINT, SIG_DFL);
+ }
+
+
int main (int argc, char **argv) {
char c = 0;
***************
*** 92,100 ****
char *trueLatencyMatrixFile = NULL;
int seed = getpid();
- int ROUNDS = 0;
int meanLifetime = 0;
bool useChurn = false;
bool clearCoordMemory = false;
bool bimodalPrune = false;
FILE *fp;
--- 107,115 ----
char *trueLatencyMatrixFile = NULL;
int seed = getpid();
int meanLifetime = 0;
bool useChurn = false;
bool clearCoordMemory = false;
bool bimodalPrune = false;
+ (void) signal(SIGINT, exit_program);
FILE *fp;
***************
*** 216,220 ****
int myId, yourId;
! int stamp = 0;
float rawLatencySample;
bool *validNode;
--- 231,235 ----
int myId, yourId;
!
float rawLatencySample;
bool *validNode;
***************
*** 260,263 ****
--- 275,330 ----
int totalLatencySampleCount = 0;
int badBounds = 0;
+
+ #define TRUE_MATRIX 1
+ #ifdef TRUE_MATRIX
+
+
+
+ for (int myId = 0; myId < nodeCount; myId++) {
+
+ for (int yourId = 0; yourId < nodeCount; yourId++) {
+
+ int scanRet = 0;
+
+ scanRet = fscanf (fp, "%f", &rawLatencySample);
+ ASSERT (scanRet == 1);
+
+
+ if (yourId < nodeCount - 1) {
+ scanRet = fscanf (fp, " ");
+ ASSERT (scanRet == 0);
+ //printf ("got space\n");
+ } else {
+ scanRet += fscanf (fp, "\n");
+ ASSERT (scanRet == 1);
+ //printf ("got ret\n");
+ }
+
+
+ //ASSERT (myId >= 0 && myId < nodeCount);
+ //ASSERT (yourId >= 0 && yourId < nodeCount);
+
+ //if (!sparseOK) {
+ //ASSERT (rawLatencySample >= 0);
+ //}
+ if (myId == yourId) {
+ if (rawLatencySample != 0) {
+ fprintf (stderr, "src %d dst %d sample %f\n",
+ myId, yourId, rawLatencySample);
+ ASSERT (rawLatencySample == 0);
+ }
+ }
+ if (rawLatencySample < 0) {
+ //missingCount++;
+ badLatencySampleCount++;
+ }
+
+ totalLatencySampleCount++;
+ rtts[myId][yourId] = rawLatencySample;
+ }
+ }
+
+
+ #else
while (fscanf (fp, "%d %d %f\n", &myId, &yourId, &rawLatencySample) > 0) {
if (rawLatencySample > 0.) {
***************
*** 278,281 ****
--- 345,350 ----
}
}
+ #endif
+
fclose (fp);
if (badLatencySampleCount > 0) {
***************
*** 458,462 ****
// process from rtts
! while (stamp < ROUNDS) {
// pick random sample
--- 527,531 ----
// process from rtts
! while (!shutdown && (stamp < ROUNDS || ROUNDS == 0)) {
// pick random sample
Index: Makefile
===================================================================
RCS file: /cvsroot/pyxida/Pyxida/sim/Makefile,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** Makefile 15 Mar 2007 12:20:49 -0000 1.1
--- Makefile 19 Dec 2008 19:00:52 -0000 1.2
***************
*** 13,17 ****
#PROGRAMS = histogram
#PROGRAMS = zone
! #PROGRAMS = vivaldi
LD = ld
--- 13,17 ----
#PROGRAMS = histogram
#PROGRAMS = zone
! PROGRAMS = vivaldi
LD = ld
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