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Victor G. Lesau


Dynamic Partial Reconfiguration (DPR) of Field Programmable Gate Arrays (FPGAs) is a technology that enables the development of embedded systems with hot swappable logic on the FPGA fabric. The advantage is that hardware logic can be swapped in and out "on-the-fly" while the rest of the system is operational. Since DPR is relatively new, tool support is still evolving. This project introduces new FPGA architectural tools and Linux OS modifications that aid in supporting DPR on FPGAs for concurrent control. It shows that control systems benefit from hardware concurrency, meaning that by moving the control intelligence into hardware, the negative effects inherent to threads and their scheduler are minimized. This leaves software with the role of a high-level administrator rather than an executor, thereby eliminating unnecessary bottlenecks. The tools described in this project enable the hardware engineer to develop DPR-FPGA systems more effectively for rapid control system development.

User Guide: http://sourceforge.net/projects/prhardware/files/TERRAE_UserGuide.pdf

This project re-uses Xilinx Mailbox Linux driver:
- C. Foucher and V.G. Lesau. (2012, Feb. 9). Open source Xilinx mailbox Linux drivers [Online]. Available: http://sourceforge.net/projects/mboxlinux

Victor G. Lesau

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