From: Pekka J. <pek...@tu...> - 2011-10-30 11:01:44
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Hi Erik, On 10/29/2011 07:43 PM, Erik Schnetter wrote: > When I use clang 3.1 (a recent snapshot) to translate e.g. the fabs > intrinsic, acting on a single floating point number, then then > generated x86 code looks like > > _Z4fabsf: # @_Z4fabsf > movd %xmm0, %eax > andl $2147483647, %eax # imm = 0x7FFFFFFF > movd %eax, %xmm0 > ret > > This is not optimal, since the value is moved from xmm0 to eax and > back, which is not necessary. Instead of andl, I expect to see the > andss instruction. > > How do I go about having this corrected? Is this a problem in pocl, in > clang, in llvm, or in the way one of these are used? I'm not familiar with the SSE instruction extensions but quick googling didn't return 'andss' for single floats. E.g.: http://en.wikipedia.org/wiki/X86_instruction_listings I see this absf implementation uses bit manipulation to reset the sign bit of the float word to return the absolute. Thus, in case SSE does not have 'and', it has to go back to the x86 instruction set to perform the and to reset the sign bit. If SSE has a suitable 'and', it should be able to operate directly on the xmm reg in which case it's an LLVM instruction selection issue. In that case overriding the implementation with inline assembly can circumvent the issue. Of course, the preferred way is to add proper 'andss' to the instruction patterns in the LLVM side, if such is available. -- --Pekka |