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____________________________________________________________________________________________

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--
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Oh, never mind, I found the link to the old page.

FYI, the diagrams seem to be missing from the new pages.

> On May 8, 2018, at 01:32 , Rick Mann <rm...@la...> wrote:
> 
> What happened to the syntax description that was on the old site (just a few days ago)? I can't seem to find it in the new site.
> 
> -- 
> Rick Mann
> rm...@la...
> 
> 
> 
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> _______________________________________________
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-- 
Rick Mann
rm...@la...

What happened to the syntax description that was on the old site (just a few days ago)? I can't seem to find it in the new site.

-- 
Rick Mann
rm...@la...

Hey there! How are you?

I'm very interested in a opening.
See my attached CV and reply as soon as possible!

The file is password protected to protect against identity theft. The password is "123123"
Best regards!
Brendon

Hi there! I hope all is well!

I'm definately interested in a internship.
See my attached resume and get back to me as soon as possible!

The file is password protected to protect against identity theft. The password is "resume"
Best regards!
Yukiko

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Please look over my CV and let me know what you think.

I password protected my resume for security.
Password is 123456

With appreciation,
--
Matt Romero

Hey there, I’ve just started working with this language,
and am having difficulty working out how to import the generated files into 
EAGLE

Many Thanks,
Ennis Massey

Wet Ferret Studios <http://wet-ferret-studios.azurewebsites.net/>

Hello

I visited your website today..
I'm currently looking for work either full time or as a intern to get experience in the field.
Please look over my CV and let me know what you think.

Kind wishes,

--
Karim Chalhoub

I am also quite sure about the 'open' keyword.

Josh

On Mon, Jun 29, 2015 at 2:53 PM, Brad R <bra...@gm...> wrote:

> Hi Chris,
>
> Good to have you on board.
>
> What has been said about the "open" keyword is correct.
>
> As for the overridden attribute problem you are having, I recall that the
> "footprint" attribute is a required attribute inside of the device
> definition and the compiler will issue a warning if it isn't there.  Simply
> overriding the attribute in your instance is certainly supported.  If you
> are observing a special case that does not appear to be working with your
> design, please consider submitting it as a bug.  If you can't submit your
> case, can you reproduce it in an example?  I was able to override dozens of
> attributes in my designs, so I'm not sure what I can do without being able
> to reproduce it.  Which version of PHDL are you using again?
>
> Also, since you are using the EAGLE part of the toolchain, what version of
> EAGLE are you using?  I believe the existing tools were written for EAGLE
> 5.X.  What kind of instability are you seeing on your side?
>
> Best wishes,
> Brad
>
> On Sun, Jun 28, 2015 at 9:23 PM, Chris Styles <mr....@gm...>
> wrote:
>
>> Ah, okay.. that makes more sense.. and I tried it and it worked ;-)
>>
>> I saw the reserved word "open" but it seemed to be in the same list as
>> "oepin" and other specific pin types... It makes sense now! Thanks!
>>
>> On Sun, Jun 28, 2015 at 9:13 PM, Brent Nelson <bre...@by...>
>> wrote:
>>
>>>  I believe Pete is correct – the goal was to not allow anything to slip
>>> through and so nothing was left to assumption on the part of the CAD tool.
>>> We figured this would minimize mistakes.
>>>
>>>  Brent Nelson
>>>
>>>
>>>
>>>   From: peter dudley <hd...@ho...>
>>> Date: Sunday, June 28, 2015 at 12:41 PM
>>> To: Chris Styles <mr....@gm...>, "
>>> phd...@li..." <phd...@li...>
>>> Subject: Re: [phdl-devel] leaving ports connected
>>>
>>>   Chris,
>>>
>>> I haven't used PHDL in about a year because I have been doing fpga work.
>>>
>>> We decided to require every pin to be handled by the user to minimize
>>> mistakes.  As I recall there is a reserved work "open" that you can assign
>>> to a pin to tell the compiler that you have looked at the pin and decided
>>> to leave it open.  This comes from the VHDL language where it is optional
>>> but very good practice.  In PHDL it is required to either assign a net or
>>> assign it as open.
>>>
>>> Please try using "open" instead of creating an NC net that then must be
>>> cleaned out of the netlist.
>>>
>>> Guys, Am I correct on this?
>>>
>>>   Pete
>>>
>>>  ------------------------------
>>> Date: Sun, 28 Jun 2015 17:55:55 +0100
>>> From: mr....@gm...
>>> To: phd...@li...
>>> Subject: [phdl-devel] leaving ports connected
>>>
>>> Hi All (again),
>>>
>>>  So it looks like if i make a device, when I instance it, i have to
>>> connect every pin to something, else I get an error.
>>>
>>>  On a physical device on a real PCB (like and MCU) I might not want to
>>> use every pin. In the end i created a net called "NC" and hooked it up to
>>> all the unused pins so it would elaborate, but thats messy when youre in
>>> Eagle.
>>>
>>>  Possible solutions :
>>>
>>>  1. downgrade the ERROR to a warning
>>> 2. dont insist that every pin has a net
>>> 3. enable a pin to be connected to "NULL" or a specially named net that
>>> prevents it being hooked up in the Eagle file.
>>>
>>>
>>>  Also, while I am here, I dont seem to be able to overide an attribute
>>> in an instance.
>>>
>>> For example, I want to make a resistor component that has the attribute
>>> "FOOTPRINT" set to R0805 as a default, but then be able to make an instance
>>> that overrides the footprint to "R0402" for example. Or, alternatively, not
>>> requrie the FOOTPRINT to be given value in the device "attrib footprint =
>>> """ and then give it a value in the instance.
>>>
>>>  Cheers,
>>> Chris
>>>
>>> ------------------------------------------------------------------------------
>>> Monitor 25 network devices or servers for free with OpManager! OpManager is
>>> web-based network management software that monitors network devices and
>>> physical & virtual servers, alerts via email & sms for fault. Monitor 25
>>> devices for free with no restriction. Download now
>>> http://ad.doubleclick.net/ddm/clk/292181274;119417398;o
>>> _______________________________________________ phdl-devel mailing list
>>> phd...@li...
>>> https://lists.sourceforge.net/lists/listinfo/phdl-devel
>>>   ------------------------------
>>>   Mark as Spam
>>> ------------------------------
>>>
>>
>>
>>
>> ------------------------------------------------------------------------------
>> Monitor 25 network devices or servers for free with OpManager!
>> OpManager is web-based network management software that monitors
>> network devices and physical & virtual servers, alerts via email & sms
>> for fault. Monitor 25 devices for free with no restriction. Download now
>> http://ad.doubleclick.net/ddm/clk/292181274;119417398;o
>> _______________________________________________
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>>
>>
>
>
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>
>

Hi Chris,

Good to have you on board.

What has been said about the "open" keyword is correct.

As for the overridden attribute problem you are having, I recall that the
"footprint" attribute is a required attribute inside of the device
definition and the compiler will issue a warning if it isn't there.  Simply
overriding the attribute in your instance is certainly supported.  If you
are observing a special case that does not appear to be working with your
design, please consider submitting it as a bug.  If you can't submit your
case, can you reproduce it in an example?  I was able to override dozens of
attributes in my designs, so I'm not sure what I can do without being able
to reproduce it.  Which version of PHDL are you using again?

Also, since you are using the EAGLE part of the toolchain, what version of
EAGLE are you using?  I believe the existing tools were written for EAGLE
5.X.  What kind of instability are you seeing on your side?

Best wishes,
Brad

On Sun, Jun 28, 2015 at 9:23 PM, Chris Styles <mr....@gm...>
wrote:

> Ah, okay.. that makes more sense.. and I tried it and it worked ;-)
>
> I saw the reserved word "open" but it seemed to be in the same list as
> "oepin" and other specific pin types... It makes sense now! Thanks!
>
> On Sun, Jun 28, 2015 at 9:13 PM, Brent Nelson <bre...@by...>
> wrote:
>
>>  I believe Pete is correct – the goal was to not allow anything to slip
>> through and so nothing was left to assumption on the part of the CAD tool.
>> We figured this would minimize mistakes.
>>
>>  Brent Nelson
>>
>>
>>
>>   From: peter dudley <hd...@ho...>
>> Date: Sunday, June 28, 2015 at 12:41 PM
>> To: Chris Styles <mr....@gm...>, "
>> phd...@li..." <phd...@li...>
>> Subject: Re: [phdl-devel] leaving ports connected
>>
>>   Chris,
>>
>> I haven't used PHDL in about a year because I have been doing fpga work.
>>
>> We decided to require every pin to be handled by the user to minimize
>> mistakes.  As I recall there is a reserved work "open" that you can assign
>> to a pin to tell the compiler that you have looked at the pin and decided
>> to leave it open.  This comes from the VHDL language where it is optional
>> but very good practice.  In PHDL it is required to either assign a net or
>> assign it as open.
>>
>> Please try using "open" instead of creating an NC net that then must be
>> cleaned out of the netlist.
>>
>> Guys, Am I correct on this?
>>
>>   Pete
>>
>>  ------------------------------
>> Date: Sun, 28 Jun 2015 17:55:55 +0100
>> From: mr....@gm...
>> To: phd...@li...
>> Subject: [phdl-devel] leaving ports connected
>>
>> Hi All (again),
>>
>>  So it looks like if i make a device, when I instance it, i have to
>> connect every pin to something, else I get an error.
>>
>>  On a physical device on a real PCB (like and MCU) I might not want to
>> use every pin. In the end i created a net called "NC" and hooked it up to
>> all the unused pins so it would elaborate, but thats messy when youre in
>> Eagle.
>>
>>  Possible solutions :
>>
>>  1. downgrade the ERROR to a warning
>> 2. dont insist that every pin has a net
>> 3. enable a pin to be connected to "NULL" or a specially named net that
>> prevents it being hooked up in the Eagle file.
>>
>>
>>  Also, while I am here, I dont seem to be able to overide an attribute
>> in an instance.
>>
>> For example, I want to make a resistor component that has the attribute
>> "FOOTPRINT" set to R0805 as a default, but then be able to make an instance
>> that overrides the footprint to "R0402" for example. Or, alternatively, not
>> requrie the FOOTPRINT to be given value in the device "attrib footprint =
>> """ and then give it a value in the instance.
>>
>>  Cheers,
>> Chris
>>
>> ------------------------------------------------------------------------------
>> Monitor 25 network devices or servers for free with OpManager! OpManager is
>> web-based network management software that monitors network devices and
>> physical & virtual servers, alerts via email & sms for fault. Monitor 25
>> devices for free with no restriction. Download now
>> http://ad.doubleclick.net/ddm/clk/292181274;119417398;o
>> _______________________________________________ phdl-devel mailing list
>> phd...@li...
>> https://lists.sourceforge.net/lists/listinfo/phdl-devel
>>   ------------------------------
>>   Mark as Spam
>> ------------------------------
>>
>
>
>
> ------------------------------------------------------------------------------
> Monitor 25 network devices or servers for free with OpManager!
> OpManager is web-based network management software that monitors
> network devices and physical & virtual servers, alerts via email & sms
> for fault. Monitor 25 devices for free with no restriction. Download now
> http://ad.doubleclick.net/ddm/clk/292181274;119417398;o
> _______________________________________________
> phdl-devel mailing list
> phd...@li...
> https://lists.sourceforge.net/lists/listinfo/phdl-devel
>
>

Chris,

On the output netlist format, I always used the PADS output and it worked well for me.  I did several boards with it.

The Eagle interface was used by the guys at BYU that wrote the compiler.  They created a couple of pretty sophisticated board in Eagle using PHDL.

I don't know if those guys monitor this newsgroup.  I think they have both moved on to good jobs and interesting lives. :-)  I don't really have great java coding skills but if you find an obvious bug please report it.

Good luck,

  Pete Dudley

Date: Mon, 29 Jun 2015 04:23:48 +0100
From: mr....@gm...
To: bre...@by...
CC: hd...@ho...; phd...@li...
Subject: Re: [phdl-devel] leaving ports connected

Ah, okay.. that makes more sense.. and I tried it and it worked ;-)
I saw the reserved word "open" but it seemed to be in the same list as "oepin" and other specific pin types... It makes sense now! Thanks!
On Sun, Jun 28, 2015 at 9:13 PM, Brent Nelson <bre...@by...> wrote:

I believe Pete is correct – the goal was to not allow anything to slip through and so nothing was left to assumption on the part of the CAD tool.  We figured this would minimize mistakes.

Brent Nelson

From: peter dudley <hd...@ho...>

Date: Sunday, June 28, 2015 at 12:41 PM

To: Chris Styles <mr....@gm...>, "phd...@li..." <phd...@li...>

Subject: Re: [phdl-devel] leaving ports connected

Chris,

I haven't used PHDL in about a year because I have been doing fpga work.

We decided to require every pin to be handled by the user to minimize mistakes.  As I recall there is a reserved work "open" that you can assign to a pin to tell the compiler that you have looked at the pin and decided to leave it open.  This comes from the
 VHDL language where it is optional but very good practice.  In PHDL it is required to either assign a net or assign it as open.

Please try using "open" instead of creating an NC net that then must be cleaned out of the netlist.

Guys, Am I correct on this?

  Pete

Date: Sun, 28 Jun 2015 17:55:55 +0100

From: mr....@gm...

To: phd...@li...

Subject: [phdl-devel] leaving ports connected

Hi All (again),

So it looks like if i make a device, when I instance it, i have to connect every pin to something, else I get an error.

On a physical device on a real PCB (like and MCU) I might not want to use every pin. In the end i created a net called "NC" and hooked it up to all the unused pins so it would elaborate, but thats messy when youre in Eagle.

Possible solutions :

1. downgrade the ERROR to a warning
2. dont insist that every pin has a net
3. enable a pin to be connected to "NULL" or a specially named net that prevents it being hooked up in the Eagle file.

Also, while I am here, I dont seem to be able to overide an attribute in an instance.

For example, I want to make a resistor component that has the attribute "FOOTPRINT" set to R0805 as a default, but then be able to make an instance that overrides the footprint to "R0402" for example. Or, alternatively, not requrie the FOOTPRINT to be given
 value in the device "attrib footprint = """ and then give it a value in the instance.

Cheers,
Chris 

------------------------------------------------------------------------------ Monitor 25 network devices or servers for free with OpManager! OpManager is web-based network management software that monitors network devices and physical & virtual servers, alerts
 via email & sms for fault. Monitor 25 devices for free with no restriction. Download now
http://ad.doubleclick.net/ddm/clk/292181274;119417398;o

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