Re: [phdl-devel] [EXTERNAL] Re: PHDL 2.1 question

[Peter D. <hd...@ho...>]

Josh,

 

Thanks for the reply.  I really dislike Altium.  It is the way everything is integrated and not modular.  Also, recent versions are becoming like social media or something where your every mouse click is reported to an on-line account.  Knowledgeable users can probably get around that stuff but for the new learner it is really annoying.  It looks like you have to pay, pay, pay forever to retain access to your own intellectual property.

 

On the other hand, KiCad looks like it has real potential.  The open netlist format is easy to write.  CERN recently adopted KiCad as its standard open hardware platform.  Maybe I should do the same.

 

Au revoir,

 

                Pete

 

From: Joshua Mangelson [mailto:jos...@gm...] 
Sent: Tuesday, May 20, 2014 3:53 PM
To: Peter Dudley
Cc: <phd...@li...>
Subject: Re: [phdl-devel] [EXTERNAL] Re: PHDL 2.1 question

 

Hey Guys,

 

Its been a while since I've said anything, but I still get all of the email updates and read through them every now and then.

 

I just wanted to let you know that I looked into getting PHDL to work with Altium pretty extensively about a year ago. 

Altium actually doesn't use a netlist at all. The layout editor actually has access to all of the information contained in the original schematic and acts directly on that data rather than using a netlist as an intermediary. 

 

I looked into trying to import a netlist in another tool's netlist format but I don't think Altium has that as an option. I then looked into possibly writing a back end that generates a basic Altium schematic from a PHDL design, but it would be quite a bit more complex than the generator we have for PADS or Eagle. Its been a year or two since I worked on it, but If you have any questions let me know and I would be happy to try and help. I can't remember exactly how far I got. In the end we needed a board made sooner than it would take to write the backend, so we put the project on hold.

 

Let me know if there is anything I can help with.

 

Altium is quite a bit bigger than PADS however, and has some features that make it easier than many other schematic capture programs. It is still a schematic editor but if you had to use one, I would suggest Altium.

 

Joshua Mangelson

Brigham Young University

 

 

 

 

On Sat, May 17, 2014 at 5:55 AM, Peter Dudley <hd...@ho...> wrote:

Chuck, Wes,

Thanks for the help.  I was able to complete my design using PHDL but it
looks like the board is not going to be produced.

It contains a Xilinx Kintex part.  Originally I compiled it with Vivado but
I found that they dramatically changed the pin-out CSV format. They removed
or changed many of the entries I used to parse into the PHDL device
definition format.  Luckily, ISE 14.7 still works for 7-Series parts and
produces the CSV file in a format compatible with phdl_utils.Xilinx2PHDL.

Anyway, in my day job, it looks like I will be required to learn yet another
clickity-click EDA tool, Altium.  When I get a chance I will poke around in
there to see if I can generate the a netlist from PHDL in the Altium netlist
format.  I see that PHDL can generate an XML netlist. I have not
investigated that but if it is complete I could probably use that to
generate the Altium netlist.  There is also the PHDLTrans API though I have
not looked at that.

        Pete


-----Original Message-----
From: Graham, Charles W [mailto:cw...@sa...]
Sent: Monday, May 05, 2014 2:31 PM
To: Wesley J. Landaker; phd...@li...
Cc: Peter Dudley

Subject: Re: [phdl-devel] [EXTERNAL] Re: PHDL 2.1 question

Pete,

Wes is correct. In version 2.1 you use attr versus using newattr in version
1. So your part instance would look something like:
 inst my_part of part {
        attr REFDES = "...";
        ...
  }

Another way of doing it would be to create a blank REFDES attribute in the
device declaration and overwrite it in each part instance where you wanted
to control it:

device part {
       attr REFDES = "";
      ...
}

inst my_part of part {
        REFDES = "...";
        ...
  }

Unfortunately there doesn't seem to be a good way of automating refdes
assignments if you wanted to prevent the compiler from reassigning them each
time unless you manually constrain them.

Good luck with your board design!

Thanks,
Chuck

Charles W. Graham
Sandia National Laboratories
Embedded Signal Processors
MS-0503 Dept. 5339
P.O. Box 5800
Albuquerque, NM 87185
USA
Phone: (505) 284-8019
E-mail: cw...@sa...

-----Original Message-----
From: Wesley J. Landaker [mailto:wj...@ic...]
Sent: Sunday, May 04, 2014 12:01 PM
To: phd...@li...
Cc: Peter Dudley
Subject: [EXTERNAL] Re: [phdl-devel] PHDL 2.1 question

On Sunday, May 04, 2014 09:09:00 Peter Dudley wrote:
> Hello Guys,
>
> I am starting a new board design with PHDL.  I thought I would use
> version
> 2.1 since it is the latest and most popular version.
>
> Unfortunately,  I do not find any instructions in the tutorial about
> how to control REFDES assignments in the source HDL.  It seems to work
> fine if I let the compiler assign all the REFDES but I get an error
> when I try to add the REFDES attribute assignment or add REFPREFIX
> attributes to a subinst.

This might be an issue where you have to use "newattr" instead of "attr" or
vice-versa (the difference was well intentioned, but is a little wacky the
way it currently behaves).

If neither of those work let me know and I can look more closely in the PHDL
2.1 code.
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