#21 Vitaly's Enhancement Request from phdl-support

[Brent Nelson]

Date: 8/26/2012
E-mail from user
Name: Vitaly
Subject: Features
Email: avit99@...
Message Content:

Hello,

nice project but it lacks some features to use it in real life.

1. I don't found backannotation feature. How can i annotate back the changes made by compiler (i.e. assigned refdes'es) and PCB layout tool (i.e. pinswap)?
2. Traditional schematic editors are able to have only one schematic symbol for many components and annotate some properties to symbols dynamically via connectors to relational databases. Good examples are Cadence CIS or Mentor DxDatabook. Without such a feature i will sped time while creating numerous component definitions in PHDL.
3. How about more netlist formats? This really not big problem but...

Please tell me about roadmap of this porject. If these featurea are not in plan then i will start new project based on VHDL...

Thank you!