From: Rick K. <rk...@nc...> - 2005-07-09 05:01:30
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Edwin, Thank you for reporting this and also for the nice comment about PerfSuite, I'm very glad you find it useful and took the time to give it a try. Any of this type of report or suggestions for improvement are always welcome. I agree with you that it is probably not a bug per se, but a configuration file issue that should be corrected for future releases. I'm glad you were able to work it through without much problem. In general, the PAPI development team often updates their event definitions to improve them and make sure they're counting things as best as possible, and I bet this is what happened for PAPI_L2_DCR on the P4, and PerfSuite got a bit behind on what's the latest! Thanks again, Rick > Thank you for a very interesting and powerful tool! > > I'm not sure if this is a bug or not, but on my system I > had to disable the following line in papi3_p4.xml, v 1.4.2.3: > > <!-- =================================================== > This does not work on my P4!! > <ps_hwpc_event type="preset" name="PAPI_L2_DCR" /> > --> > > When I run a program using psrun and the unaltered (original) XML file, I > get this error message: > > => psrun -c papi3_p4.xml testCompare > psrun fatal error: hardware event not available > > When I remove the PAPI_L2_DCR event, it runs fine. > > I am using the following configuration: > > - Red Hat Enterprise Linux, kernel version 2.4.21-20.EL, patched with > perfctr-2.6.15 > - PAPI 3.0.7 > - PerfSuite 0.6.1 > - gcc version 3.2.3 20030502 (Red Hat Linux 3.2.3-42) > > The PerfSuite test suite did not have any errors. However, the PAPI > tests did show initially fail a test with overflow3_pthreads.c, > but I just ran them again and it now passes all of them. Maybe a recompile > fixed it, > who knows? > > Here are my system details (from psinv): > > System Information - > Processors: 1 > Total Memory (MB): 1002.93 > System Page Size (KB): 4.00 > > Processor Information - > Vendor: Intel > Processor family: Pentium 4 > Brand: Intel(R) Pentium(R) 4 CPU 2.66GHz > Model (Type): Pentium 4 (OEM) > Revision: 7 > Clock Speed: 2657.88 MHz > > Cache and TLB Information - > Cache levels: 2 > Caches/TLBs: 5 > > Cache Details - > Level 1: > Type: Data > Size: 8 KB > Line size: 64 bytes > Associativity: 4-way set associative > > Type: Instruction Trace > Size: 12K uOps > Associativity: 8-way set associative > > Level 2: > Type: Unified > Size: 512 KB > Line size: 64 bytes > Associativity: 8-way set associative > > TLB Details - > Level 1: > Type: Instruction > Entries: 128 > Pagesize (KB): 4 2048 4096 > Associativity: Fully associative > > Type: Data > Entries: 64 > Pagesize (KB): 4 4096 > Associativity: Fully associative > > > Regards, > Edwin Fine > Tel: (813) 978-4718 (W) > e-mail: edw...@ve... > ------------------------------ |