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From: seranian <ser...@us...> - 2024-10-07 02:06:04
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 91970fe6eb4e80b63f77fb54a9592e28a207050c (commit)
from 1c2c67b38cd28823b3e34208b86e4656b55d310f (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 91970fe6eb4e80b63f77fb54a9592e28a207050c
Author: Stephane Eranian <er...@gm...>
Date: Fri Oct 4 21:49:47 2024 -0700
Add ARM Neoverse N3 core PMU support
Adds ARM Neoverse N3 core PMU support.
Based on:
https://github.com/ARM-software/data/blob/master/pmu/neoverse-n3.json
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
README | 5 +-
docs/Makefile | 2 +
..._arm_neoverse_n2.3 => libpfm_arm_neoverse_n3.3} | 10 +-
include/perfmon/pfmlib.h | 1 +
lib/events/arm_neoverse_n3_events.h | 1027 ++++++++++++++++++++
lib/pfmlib_arm_armv9.c | 42 +
lib/pfmlib_common.c | 2 +
lib/pfmlib_priv.h | 1 +
tests/validate_arm64.c | 49 +
9 files changed, 1131 insertions(+), 8 deletions(-)
copy docs/man3/{libpfm_arm_neoverse_n2.3 => libpfm_arm_neoverse_n3.3} (68%)
create mode 100644 lib/events/arm_neoverse_n3_events.h
hooks/post-receive
--
libpfm4
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|
From: seranian <ser...@us...> - 2024-10-04 05:20:13
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 1c2c67b38cd28823b3e34208b86e4656b55d310f (commit)
from 298127beb46c43ed02f8d2f8efc8ce52a9d601db (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 1c2c67b38cd28823b3e34208b86e4656b55d310f
Author: Stephane Eranian <er...@gm...>
Date: Thu Oct 3 22:18:54 2024 -0700
fix group_pmu initialization in perf_examples/task
Variable was reinitialized at each iteration preventing
events from being group by fd via perf_event_open()
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
perf_examples/task.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
--
libpfm4
|
|
From: seranian <ser...@us...> - 2024-10-01 05:46:54
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 298127beb46c43ed02f8d2f8efc8ce52a9d601db (commit)
via d01108b9b470131545389be4f2f479d0fa4b9444 (commit)
via d9de389d9cf168116b4753ac7d94edbffcd2a161 (commit)
via 1530567c76d290233b68e71b064cb1c3abfde8c3 (commit)
via 7e131752c0e486555cbb57342cdac2087e129dd4 (commit)
via bf495f91ef5c455af0de679703090566a776b65a (commit)
via 8717588413b931818eddc6c9caaa9995c7d2418d (commit)
via 704fb4aa4b722c110256ec0488e8f895542f64ab (commit)
from c89a379175c00a20bbc660ad9b444e8ecc16cd28 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 298127beb46c43ed02f8d2f8efc8ce52a9d601db
Author: Stephane Eranian <er...@gm...>
Date: Mon Sep 30 22:36:23 2024 -0700
Add support for Topdown via PERF_METRICS for Intel Icelake/IcelakeX
Add the TOPDOWN_M dedicated event to provide the pseudo
encodings necessary to program Topdown L1 events onto the
PERF_METRICS MSR of Intel GraniteRapids on Linux.
In order to successfully use PERF_METRICS, the kernel imposes
some restrictions (which are not known to libpfm4) which the
user must follow:
TOPDOWN_M events must be passed to the kernel in a single
perf_events group (chained fds) AND the TOPDOWN_M.SLOTS event
must be the first event in that group.
Note that only the SLOTS events (programmed in fixed counter3)
support modifiers such as user vs. kernel, hw_smpl or precise
sampling on perf_events. All other umasks do not support any modifier.
The SLOTS event controls the filtering for all PERF_METRICS pseudo
events.
The encodings provided by libpfm4 for fixed counters are specific
to Linux. When used on non Linux systems, encodings are not
guaranteed to be valid.
Signed-off-by: Stephane Eranian <er...@gm...>
commit d01108b9b470131545389be4f2f479d0fa4b9444
Author: Stephane Eranian <er...@gm...>
Date: Mon Sep 30 22:26:40 2024 -0700
Add support for Topdown via PERF_METRICS for Intel GraniteRapids
Cut & paste of the Intel SapphireRapids support.
Add the TOPDOWN_M dedicated event to provide the pseudo
encodings necessary to program Topdown L1 and L2 events onto the
PERF_METRICS MSR of Intel GraniteRapids on Linux.
In order to successfully use PERF_METRICS, the kernel imposes
some restrictions (which are not known to libpfm4) which the
user must follow:
TOPDOWN_M events must be passed to the kernel in a single
perf_events group (chained fds) AND the TOPDOWN_M.SLOTS event
must be the first event in that group.
Note that only the SLOTS events (programmed in fixed counter3)
support modifiers such as user vs. kernel, hw_smpl or precise
sampling on perf_events. All other umasks do not support any modifier.
The SLOTS event controls the filtering for all PERF_METRICS pseudo
events.
The encodings provided by libpfm4 for fixed counters are specific
to Linux. When used on non Linux systems, encodings are not
guaranteed to be valid.
Signed-off-by: Stephane Eranian <er...@gm...>
commit d9de389d9cf168116b4753ac7d94edbffcd2a161
Author: Stephane Eranian <er...@gm...>
Date: Thu Aug 22 23:36:03 2024 -0700
Add support for Topdown via PERF_METRICS for Intel SapphireRapids
Add the TOPDOWN_M dedicated event to provide the pseudo
encodings necessary to program Topdown L1 and L2 events onto the
PERF_METRICS MSR of Intel SapphireRapids on Linux.
In order to successfully use PERF_METRICS, the kernel imposes
some restrictions (which are not known to libpfm4) which the
user must follow:
TOPDOWN_M events must be passed to the kernel in a single
perf_events group (chained fds) AND the TOPDOWN_M.SLOTS event
must be the first event in that group.
Note that only the SLOTS events (programmed in fixed counter3)
support modifiers such as user vs. kernel, hw_smpl or precise
sampling on perf_events. All other umasks do not support any modifier.
The SLOTS event controls the filtering for all PERF_METRICS pseudo
events.
The encodings provided by libpfm4 for fixed counters are specific
to Linux. When used on non Linux systems, encodings are not
guaranteed to be valid.
Signed-off-by: Stephane Eranian <er...@gm...>
commit 1530567c76d290233b68e71b064cb1c3abfde8c3
Author: Stephane Eranian <er...@gm...>
Date: Sun Sep 29 21:35:15 2024 -0700
add support_no_mods support to Intel X86 encoding
This patch adds support for attribute info support_no_mods
to Intel X86 encoding routines. There is a new INTEL_X86_NO_MODS
flags that can be set on umasks flags field.
Signed-off-by: Stephane Eranian <er...@gm...>
commit 7e131752c0e486555cbb57342cdac2087e129dd4
Author: Stephane Eranian <er...@gm...>
Date: Sun Sep 29 21:11:41 2024 -0700
Add support_no_mods support to perf_events encoding
This patch adds handling of the support_no_mods attribute info to
perf_events encoding routine. If the flag is set for any umasks
then it is applied to all. It is expected that events with such
conditions prohibit umasks combinations. Only the perf_events
pinned attribute is maintained because it is a modifier of the
perf_events subsystem with no specific implication in the hardware.
Signed-off-by: Stephane Eranian <er...@gm...>
commit bf495f91ef5c455af0de679703090566a776b65a
Author: Stephane Eranian <er...@gm...>
Date: Sun Sep 29 21:45:59 2024 -0700
Add support_hw_smpl description to pfm_get_event_attr_info() man page
Was missing from manual since the field was added.
Signed-off-by: Stephane Eranian <er...@gm...>
commit 8717588413b931818eddc6c9caaa9995c7d2418d
Author: Stephane Eranian <er...@gm...>
Date: Sun Sep 29 21:08:08 2024 -0700
Add new attribute info field support_no_mods
This new attribute is added to the pfm_event_attr_info_t structure
to handle the case where some of the umasks of an event do not
support all the modifiers that the event as a whole support.
That applies to privilege level filtering, hardware sampling and such.
Signed-off-by: Stephane Eranian <er...@gm...>
commit 704fb4aa4b722c110256ec0488e8f895542f64ab
Author: Stephane Eranian <er...@gm...>
Date: Sat Sep 28 23:07:55 2024 -0700
fix assignment in pfmlib_build_event_pattrs
Was doing os_nattrs += ..... then os_nattrs was just initialized
at declaration with no prior usage.
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
docs/man3/libpfm_intel_gnr.3 | 5 +
docs/man3/libpfm_intel_icl.3 | 4 +
docs/man3/libpfm_intel_spr.3 | 18 ++--
docs/man3/pfm_get_event_attr_info.3 | 14 ++-
examples/showevtinfo.c | 5 +
include/perfmon/pfmlib.h | 3 +-
lib/events/intel_gnr_events.h | 57 +++++++++++
lib/events/intel_icl_events.h | 37 +++++++
lib/events/intel_spr_events.h | 57 +++++++++++
lib/pfmlib_common.c | 3 +-
lib/pfmlib_intel_x86.c | 18 +++-
lib/pfmlib_intel_x86_priv.h | 1 +
lib/pfmlib_perf_event.c | 51 +++++++++-
lib/pfmlib_priv.h | 3 +-
tests/validate_x86.c | 196 ++++++++++++++++++++++++++++++++++++
15 files changed, 457 insertions(+), 15 deletions(-)
hooks/post-receive
--
libpfm4
|
|
From: seranian <ser...@us...> - 2024-09-22 04:15:01
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via c89a379175c00a20bbc660ad9b444e8ecc16cd28 (commit)
from 6195cbb4686dbeeee7a237ab8a133ef6c2209476 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit c89a379175c00a20bbc660ad9b444e8ecc16cd28
Author: Stephane Eranian <er...@gm...>
Date: Sat Sep 21 21:11:10 2024 -0700
add ARM Cortex A76 core PMU support
Adds ARM Cortex A76 core PMU support.
Based on:
https://github.com/ARM-software/data/blob/master/pmu/cortex-a76.json
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
README | 2 +-
docs/Makefile | 2 +
docs/man3/{libpfm_arm_ac55.3 => libpfm_arm_ac76.3} | 10 +-
include/perfmon/pfmlib.h | 1 +
...cortex_a55_events.h => arm_cortex_a76_events.h} | 435 ++++++++++-----------
lib/pfmlib_arm_armv8.c | 44 +++
lib/pfmlib_common.c | 2 +
lib/pfmlib_priv.h | 1 +
8 files changed, 260 insertions(+), 237 deletions(-)
copy docs/man3/{libpfm_arm_ac55.3 => libpfm_arm_ac76.3} (75%)
copy lib/events/{arm_cortex_a55_events.h => arm_cortex_a76_events.h} (58%)
hooks/post-receive
--
libpfm4
|
|
From: seranian <ser...@us...> - 2024-09-22 03:51:34
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 6195cbb4686dbeeee7a237ab8a133ef6c2209476 (commit)
from 1e8734203f74f0ec6974a860c0b18cb95cce1371 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 6195cbb4686dbeeee7a237ab8a133ef6c2209476
Author: Stephane Eranian <er...@gm...>
Date: Sat Sep 21 20:50:17 2024 -0700
fix detection of ARM Cortex A55
Was using code not yet released.
Bug introduced by:
c40b6eb0640a ("add ARM Cortex A55 core PMU support")
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
lib/pfmlib_arm_armv8.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
hooks/post-receive
--
libpfm4
|
|
From: seranian <ser...@us...> - 2024-09-22 02:56:45
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 1e8734203f74f0ec6974a860c0b18cb95cce1371 (commit)
via c40b6eb0640a649b2c3fdf472c1d6499a8e819c0 (commit)
from f91ea4f1a76fdd5886fd9b6fe8eaa6f585a5bac4 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 1e8734203f74f0ec6974a860c0b18cb95cce1371
Author: Sachin Monga <sm...@li...>
Date: Thu Aug 15 12:54:51 2024 -0400
Update IBM Power10 core PMU support
Added additional events for IBM Power 10 core PMU.
Signed-off-by: Sachin Monga <sm...@li...>
commit c40b6eb0640a649b2c3fdf472c1d6499a8e819c0
Author: Stephane Eranian <er...@gm...>
Date: Sat Sep 21 19:47:08 2024 -0700
add ARM Cortex A55 core PMU support
Add support for ARM Cortex A55 core PMU events.
Based on:
https://github.com/ARM-software/data/blob/master/pmu/cortex-a55.json
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
README | 2 +-
docs/Makefile | 2 +
docs/man3/{libpfm_arm_ac72.3 => libpfm_arm_ac55.3} | 10 +-
include/perfmon/pfmlib.h | 1 +
lib/events/arm_cortex_a55_events.h | 591 +++++++++++++++++++++
lib/events/power10_events.h | 109 +++-
lib/pfmlib_arm_armv8.c | 38 ++
lib/pfmlib_common.c | 2 +
lib/pfmlib_priv.h | 1 +
9 files changed, 748 insertions(+), 8 deletions(-)
copy docs/man3/{libpfm_arm_ac72.3 => libpfm_arm_ac55.3} (75%)
create mode 100644 lib/events/arm_cortex_a55_events.h
hooks/post-receive
--
libpfm4
|
|
From: seranian <ser...@us...> - 2024-09-20 06:27:40
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via f91ea4f1a76fdd5886fd9b6fe8eaa6f585a5bac4 (commit)
via 892c5fc89ed5fc0e4f0b4a4a290fac57613f23da (commit)
from b30681f629517a3159d79dcef0b703687524ad59 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit f91ea4f1a76fdd5886fd9b6fe8eaa6f585a5bac4
Author: Stephane Eranian <er...@gm...>
Date: Thu Sep 19 21:23:59 2024 -0700
fix ARM thunderX2 and HiSilicon support to compile on non Linux
The perf_events encoding routines were mixed with generic encodings
and event tables. This patch cleans all of this to separate generic
from Linux specific code.
commit 892c5fc89ed5fc0e4f0b4a4a290fac57613f23da
Author: Stephane Eranian <er...@gm...>
Date: Thu Sep 19 00:38:14 2024 -0700
Add ARM Neoverse V3 core PMU support
Based on:
https://github.com/ARM-software/data/blob/master/pmu/neoverse-v3.json
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
README | 1 +
docs/Makefile | 12 +-
...{libpfm_arm_ac72.3 => libpfm_arm_neoverse_v3.3} | 10 +-
include/perfmon/pfmlib.h | 1 +
lib/Makefile | 22 +-
lib/events/arm_hisilicon_kunpeng_unc_events.h | 6 -
lib/events/arm_marvell_tx2_unc_events.h | 5 -
lib/events/arm_neoverse_v3_events.h | 1170 ++++++++++++++++++++
lib/pfmlib_arm_armv8.c | 219 ----
lib/pfmlib_arm_armv8_kunpeng_unc.c | 223 ++++
...c => pfmlib_arm_armv8_kunpeng_unc_perf_event.c} | 42 +-
lib/pfmlib_arm_armv8_thunderx2_unc.c | 156 +++
...=> pfmlib_arm_armv8_thunderx2_unc_perf_event.c} | 46 +-
lib/pfmlib_arm_armv8_unc.c | 308 ++++++
lib/pfmlib_arm_armv8_unc_priv.h | 23 +
lib/pfmlib_arm_armv9.c | 41 +
lib/pfmlib_common.c | 2 +
lib/pfmlib_priv.h | 1 +
tests/validate_arm.c | 35 +
tests/validate_arm64.c | 23 +-
20 files changed, 2015 insertions(+), 331 deletions(-)
copy docs/man3/{libpfm_arm_ac72.3 => libpfm_arm_neoverse_v3.3} (74%)
create mode 100644 lib/events/arm_neoverse_v3_events.h
create mode 100644 lib/pfmlib_arm_armv8_kunpeng_unc.c
rename lib/{pfmlib_kunpeng_unc_perf_event.c => pfmlib_arm_armv8_kunpeng_unc_perf_event.c} (72%)
create mode 100644 lib/pfmlib_arm_armv8_thunderx2_unc.c
rename lib/{pfmlib_tx2_unc_perf_event.c => pfmlib_arm_armv8_thunderx2_unc_perf_event.c} (57%)
create mode 100644 lib/pfmlib_arm_armv8_unc.c
create mode 100644 lib/pfmlib_arm_armv8_unc_priv.h
hooks/post-receive
--
libpfm4
|
|
From: seranian <ser...@us...> - 2024-09-18 05:06:27
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 0118612a28d270e78d1f17c24e9db0935e332285 (commit)
from 3724e7ef87e71dd1de46ef4eb4ec2b1be4ea63e5 (commit)
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commit 0118612a28d270e78d1f17c24e9db0935e332285
Author: Stephane Eranian <er...@gm...>
Date: Tue Sep 17 16:36:24 2024 -0700
remove extraneous printf in pfmlib_init_env()
Was introduced by mistake by commit:
32b7c3d6ab6b ("add LIBPFM_PROC_CPUINFO variable for Linux")
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
lib/pfmlib_common.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
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From: seranian <ser...@us...> - 2024-09-17 05:38:34
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
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from 9c5c88e734e866f0801b80c527330ad6dbe21e89 (commit)
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commit 3724e7ef87e71dd1de46ef4eb4ec2b1be4ea63e5
Author: Stephane Eranian <er...@gm...>
Date: Sun Sep 15 22:29:37 2024 -0700
add LIBPFM_PROC_CPUINFO variable for Linux
Allows overriding the filename used to parse the /proc/cpuinfo
file. This can be used to detect certain CPU models, such
as on ARM. Providing an override allows testing without the actual
hardware.
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
lib/pfmlib_common.c | 6 ++++++
lib/pfmlib_priv.h | 1 +
2 files changed, 7 insertions(+)
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From: seranian <ser...@us...> - 2024-09-11 07:02:37
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 9c5c88e734e866f0801b80c527330ad6dbe21e89 (commit)
from 6d276b48eba5ead4e3fd4b6eca359504f2b69b6c (commit)
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commit 9c5c88e734e866f0801b80c527330ad6dbe21e89
Author: Stephane Eranian <er...@gm...>
Date: Tue Sep 10 23:58:35 2024 -0700
add ARM Cortex A72 Core PMU support
As a clone of Cortex A57.
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
README | 2 +-
docs/Makefile | 2 ++
docs/man3/{libpfm_arm_ac57.3 => libpfm_arm_ac72.3} | 12 +++----
include/perfmon/pfmlib.h | 2 ++
lib/pfmlib_arm_armv8.c | 42 ++++++++++++++++++++++
lib/pfmlib_common.c | 2 ++
lib/pfmlib_priv.h | 1 +
7 files changed, 56 insertions(+), 7 deletions(-)
copy docs/man3/{libpfm_arm_ac57.3 => libpfm_arm_ac72.3} (68%)
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From: seranian <ser...@us...> - 2024-09-09 16:26:39
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This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
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via fd3191c34ad87e22d3f3d31d2cf5c1050a9136ba (commit)
from 0d799b5546477a46b3a52310bbf1884d56e9e37f (commit)
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commit 6d276b48eba5ead4e3fd4b6eca359504f2b69b6c
Author: Ian Rogers <ir...@go...>
Date: Mon Sep 9 09:22:50 2024 -0700
fix pfm_arm_detect() buffer initialization problem
Commit 3abda5bc6c1a ("Optimize pfm_detect() for ARM processors")
added an optimization to avoid parsing /proc/cpuinfo too many times.
But it had a bug whereby it was reinitializing the pfm_arm_cfg.*
fields multiple times and potentially from an uninitialized buffer.
Signed-off-by: Ian Rogers <ir...@go...>
commit fd3191c34ad87e22d3f3d31d2cf5c1050a9136ba
Author: Stephane Eranian <er...@gm...>
Date: Thu Sep 5 23:38:53 2024 -0700
Fix FRONTEND_RETIRED.LATE_SWPF encoding on Intel GNR
Fix was missing from commit d799b554647 ("update Intel GraniteRapids core PMU to 1.03")
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
lib/events/intel_gnr_events.h | 2 +-
lib/pfmlib_arm.c | 9 +++------
tests/validate_x86.c | 2 +-
3 files changed, 5 insertions(+), 8 deletions(-)
hooks/post-receive
--
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|
From: Sachin M. <sm...@li...> - 2024-09-05 04:22:33
|
Dear libpfm4 team Please find attached the patch for review and let me know if the patch is acceptable for upstream. We are working on an important requirement for one of IBM's Power10 customers which needs libpfm4/PAPI support. We are hoping to get the support added as soon as possible. Thank you for your consideration. Regards: Sachin. |
|
From: seranian <ser...@us...> - 2024-09-03 04:54:10
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 0d799b5546477a46b3a52310bbf1884d56e9e37f (commit)
from 3abda5bc6c1af7f1b620dc594a806b3b5a4134cb (commit)
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commit 0d799b5546477a46b3a52310bbf1884d56e9e37f
Author: Stephane Eranian <er...@gm...>
Date: Mon Sep 2 21:51:03 2024 -0700
update Intel GraniteRapids core PMU to 1.03
Updates the Intel GraniteRapids core PMU event table
to latest Intel released version:
Date : 08/19/2024
Version: 1.03
From gitub.com/Intel/perfmon
Signed-off-by: Stephane Eranian <er...@gm...>
update Intel GraniteRapids core PMU event table
Update to upstream version 1.03
-----------------------------------------------------------------------
Summary of changes:
lib/events/intel_gnr_events.h | 176 ++++++++++++++++++++++++++++++++++++++++--
1 file changed, 171 insertions(+), 5 deletions(-)
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From: seranian <ser...@us...> - 2024-08-27 20:56:14
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 3abda5bc6c1af7f1b620dc594a806b3b5a4134cb (commit)
from b8b7d69e774c38618aa440f49d69814d109629f5 (commit)
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commit 3abda5bc6c1af7f1b620dc594a806b3b5a4134cb
Author: Stephane Eranian <er...@gm...>
Date: Tue Aug 27 13:52:59 2024 -0700
Optimize pfm_detect() for ARM processors
Avoid calling pfmlib_getcpuinfo_attr() 3 times for each ARM PMU to
detect. For a given processor, the function will always return the
same information. Use the pfm_arm_cfg structure as a cache on
subsequent calls.
Note: this overall logic does not handle ARM hybrids right now.
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
docs/man3/pfm_initialize.3 | 2 ++
lib/pfmlib_arm.c | 31 ++++++++++++++++++++-----------
2 files changed, 22 insertions(+), 11 deletions(-)
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From: seranian <ser...@us...> - 2024-08-27 00:26:46
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via b8b7d69e774c38618aa440f49d69814d109629f5 (commit)
via 0d216ee4082aef2d8cabfa9816cdb6d6560d1d3f (commit)
from 874ed7cff57271c5d4e530650eadce76e3dcaa14 (commit)
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commit b8b7d69e774c38618aa440f49d69814d109629f5
Author: Stephane Eranian <er...@gm...>
Date: Mon Aug 26 17:22:47 2024 -0700
add L2D_CACHE and make L2D_CACHE_ACCESS alias for ARM Neoverse N1,N2,V2
To match kernel and documentation. Patch provides an alias to avoid
breaking existing scripts.
Signed-off-by: Stephane Eranian <er...@gm...>
commit 0d216ee4082aef2d8cabfa9816cdb6d6560d1d3f
Author: Stephane Eranian <er...@gm...>
Date: Fri Aug 16 00:29:33 2024 -0700
update Intel SapphireRapids core PMU to 1.24
Updates the Intel SapphireRapids core PMU event table
to latest Intel released version:
Date : 07/18/2024
Version: 1.24"
From gitub.com/Intel/perfmon
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
lib/events/arm_neoverse_n1_events.h | 6 ++
lib/events/arm_neoverse_n2_events.h | 6 ++
lib/events/arm_neoverse_v1_events.h | 6 ++
lib/events/intel_spr_events.h | 169 ++++++++++++++++++++++++++++--------
4 files changed, 152 insertions(+), 35 deletions(-)
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From: seranian <ser...@us...> - 2024-07-05 09:37:14
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 18f2a3e0541cc438094bbf65ebbed2b6742bf0d4 (commit)
via e50b6a47c9f9f1386805bbce3d2a634782f8c30e (commit)
from 92c52017d7395c4040ec22949ee8c7f17bc5b4f7 (commit)
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commit 18f2a3e0541cc438094bbf65ebbed2b6742bf0d4
Author: Swarup Sahoo <swa...@am...>
Date: Thu Jul 4 13:15:52 2024 -0700
Add AMD Zen5 L3 PMU support
This patch implements support for AMD Zen5 processor L3 cache PMU.
The implementation is based on "Performance Monitor Counters for AMD Family A0h Model 00h- 0Fh Processors, rev 0.02",
available at - https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/58550-0.01.pdf
Signed-off-by: Swarup Sahoo <swa...@am...>
commit e50b6a47c9f9f1386805bbce3d2a634782f8c30e
Author: Swarup Sahoo <swa...@am...>
Date: Wed Jul 3 23:50:15 2024 -0700
Add AMD Zen5 core PMU support
This patch implements support for AMD Zen5 core PMU support.
The implementation is based on "Performance Monitor Counters for AMD Family A0h Model 00h- 0Fh Processors, rev 0.02",
available at - https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/58550-0.01.pdf
Signed-off-by: Swarup Sahoo <swa...@am...>
-----------------------------------------------------------------------
Summary of changes:
README | 1 +
docs/Makefile | 2 +
...64_fam19h_zen3.3 => libpfm_amd64_fam1ah_zen5.3} | 12 +-
docs/man3/libpfm_amd64_fam1ah_zen5_l3.3 | 19 +
include/perfmon/pfmlib.h | 2 +
lib/Makefile | 5 +-
...ts_fam19h_zen4.h => amd64_events_fam1ah_zen5.h} | 1992 ++++++++++++--------
...19h_zen3_l3.h => amd64_events_fam1ah_zen5_l3.h} | 37 +-
lib/pfmlib_amd64.c | 130 +-
lib/pfmlib_amd64_fam19h_l3.c | 4 +-
...pfmlib_amd64_fam16h.c => pfmlib_amd64_fam1ah.c} | 25 +-
lib/pfmlib_amd64_fam1ah_l3.c | 76 +
lib/pfmlib_amd64_priv.h | 2 +
lib/pfmlib_common.c | 2 +
lib/pfmlib_priv.h | 2 +
tests/validate_x86.c | 119 ++
16 files changed, 1519 insertions(+), 911 deletions(-)
copy docs/man3/{libpfm_amd64_fam19h_zen3.3 => libpfm_amd64_fam1ah_zen5.3} (80%)
create mode 100644 docs/man3/libpfm_amd64_fam1ah_zen5_l3.3
copy lib/events/{amd64_events_fam19h_zen4.h => amd64_events_fam1ah_zen5.h} (64%)
copy lib/events/{amd64_events_fam19h_zen3_l3.h => amd64_events_fam1ah_zen5_l3.h} (55%)
copy lib/{pfmlib_amd64_fam16h.c => pfmlib_amd64_fam1ah.c} (77%)
create mode 100644 lib/pfmlib_amd64_fam1ah_l3.c
hooks/post-receive
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From: seranian <ser...@us...> - 2024-06-22 16:19:12
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 92c52017d7395c4040ec22949ee8c7f17bc5b4f7 (commit)
from 44a55dd97c929087b4ca93540f6bbb2d2efffd15 (commit)
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not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 92c52017d7395c4040ec22949ee8c7f17bc5b4f7
Author: Stephane Eranian <er...@gm...>
Date: Sat Jun 22 09:17:23 2024 -0700
add missing pfmlib_intel_gnr.c file
To complete the Intel GraniteRapids support.
Was missing from commit 23d0b7c47c2e ("add Intel GraniteRapids core PMU support")
Sorry about that.
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
lib/{pfmlib_intel_core.c => pfmlib_intel_gnr.c} | 56 +++++++++++--------------
1 file changed, 25 insertions(+), 31 deletions(-)
copy lib/{pfmlib_intel_core.c => pfmlib_intel_gnr.c} (70%)
hooks/post-receive
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From: seranian <ser...@us...> - 2024-06-22 05:46:42
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 44a55dd97c929087b4ca93540f6bbb2d2efffd15 (commit)
via 23d0b7c47c2ec06334b3eb378bfc3568b08e0042 (commit)
via 489a940be48980956b27dda89de1eb91b01f185d (commit)
via ace21560113100f4ab5032e99753459ed9da7049 (commit)
from 4bdeb7e067363013257460bdb6c3dbae778b5634 (commit)
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commit 44a55dd97c929087b4ca93540f6bbb2d2efffd15
Author: Thomas Richter <tm...@li...>
Date: Tue Jun 18 10:17:27 2024 +0200
s390: Fix calloc compiler error for gcc14
The definition of calloc is as follows:
void *calloc(size_t nmemb, size_t size);
number of members is in the first parameter and the
size is in the second parameter.
Fix error message on the gcc 14 20240102:
error: 'calloc' sizes specified with 'sizeof' in the earlier
argument and not in the later argument ...
by adhering to the calloc() calling convention.
Output before:
# make
Entering directory '/root/perfmon2-libpfm4/lib'
cc -g -Wall -Werror -Wextra -Wno-unused-parameter -I. \
-I/root/perfmon2-libpfm4/lib/../include -DCONFIG_PFMLIB_DEBUG \
-DCONFIG_PFMLIB_OS_LINUX -DCONFIG_PFMLIB_NOTRACEPOINT \
-DHAS_OPENAT -D_REENTRANT -I. -fvisibility=hidden \
-DCONFIG_PFMLIB_ARCH_S390X -I. -c pfmlib_s390x_cpumf.c
pfmlib_s390x_cpumf.c: In function âpfm_cpumcf_initâ:
pfmlib_s390x_cpumf.c:221:26: error: âcallocâ sizes specified with \
âsizeofâ in the earlier argument and not in the later argument \
[-Werror=calloc-transposed-args]
221 | cpumcf_pe = calloc(sizeof(*cpumcf_pe), cfvn_set_count):
| ^
pfmlib_s390x_cpumf.c:221:26: note: earlier argument should specify
number of elements, later size of each element
Signed-off-by: Thomas Richter <tm...@li...>
Acked-by: Sumanth Korikkar <sum...@li...>
commit 23d0b7c47c2ec06334b3eb378bfc3568b08e0042
Author: Stephane Eranian <er...@gm...>
Date: Mon Jun 3 23:10:45 2024 -0700
add Intel GraniteRapids core PMU support
Based on JSON event files published on github.com/Intel/perfmon
version 1.02, dated 05/10/2024
Signed-off-by: Stephane Eranian <er...@gm...>
commit 489a940be48980956b27dda89de1eb91b01f185d
Author: Stephane Eranian <er...@gm...>
Date: Fri Jun 21 21:24:34 2024 -0700
fix Intel SPR inst_retired umask flags
Were missing PEBS and fixed event code umask (ANY) was not encoded
properly.
inst_retired.any -> fixed counter 0 encoding 0x100
inst_retired.any_p -> generic counter encoding 0x00c0
Signed-off-by: Stephane Eranian <er...@gm...>
commit ace21560113100f4ab5032e99753459ed9da7049
Author: Stephane Eranian <er...@gm...>
Date: Wed Jun 19 23:32:25 2024 -0700
fix validate_x86.c Intel SPR/EMR inst_retired tests
They were not using the proper event codes for the different
versions of inst_retired.
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
README | 1 +
docs/Makefile | 1 +
.../{libpfm_intel_spr.3 => libpfm_intel_gnr.3} | 24 +-
include/perfmon/pfmlib.h | 2 +
lib/Makefile | 2 +
.../{intel_adl_glc_events.h => intel_gnr_events.h} | 1229 ++++++++++++--------
lib/events/intel_spr_events.h | 8 +-
lib/pfmlib_common.c | 1 +
lib/pfmlib_priv.h | 1 +
lib/pfmlib_s390x_cpumf.c | 4 +-
tests/validate_x86.c | 371 +++++-
11 files changed, 1149 insertions(+), 495 deletions(-)
copy docs/man3/{libpfm_intel_spr.3 => libpfm_intel_gnr.3} (72%)
copy lib/events/{intel_adl_glc_events.h => intel_gnr_events.h} (65%)
hooks/post-receive
--
libpfm4
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|
From: seranian <ser...@us...> - 2024-06-15 05:20:17
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 4bdeb7e067363013257460bdb6c3dbae778b5634 (commit)
from 7c486cf96f9eab7019023d40f9c568486f696c44 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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commit 4bdeb7e067363013257460bdb6c3dbae778b5634
Author: Stephane Eranian <er...@gm...>
Date: Fri Jun 14 22:14:05 2024 -0700
Fix encoding of inst_retired.* on Alderlake E-core
Was returning event code 0x0 for both .any and .any_p umasks.
any_p refers to the generic counter encoding which uses event
code 0xc0.
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
lib/events/intel_adl_grt_events.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
--
libpfm4
|
|
From: seranian <ser...@us...> - 2024-04-25 01:05:33
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 7c486cf96f9eab7019023d40f9c568486f696c44 (commit)
from 1c0cdb91bc79eb1bc827e022f0a3738f124796a2 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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commit 7c486cf96f9eab7019023d40f9c568486f696c44
Author: Stephane Eranian <er...@gm...>
Date: Wed Apr 24 18:01:23 2024 -0700
remove Intel IcelakeX UNC_CHA_PIPE_REJECT event
Encodings of umasks is invalid and fails to pass tests with perf as it
sets bits the kernel does not know about.
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
lib/events/intel_icx_unc_cha_events.h | 197 ----------------------------------
1 file changed, 197 deletions(-)
hooks/post-receive
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From: seranian <ser...@us...> - 2024-04-16 00:30:18
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 1c0cdb91bc79eb1bc827e022f0a3738f124796a2 (commit)
from 72866cbc2666820d87ebc0af3b1a16d1d5db6965 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 1c0cdb91bc79eb1bc827e022f0a3738f124796a2
Author: Stephane Eranian <er...@gm...>
Date: Mon Apr 15 17:27:33 2024 -0700
fix uninitialized variable in perf_examples/task.c
Commit 9410619f922f ("update task.c example to handle hybrid")
Introduced a bug by not initializing group_fd which could generate
a compiler warning and a bug.
Fix this by initializing group_fd to -1.
Reported-by: William Cohen <wc...@re...>
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
perf_examples/task.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hooks/post-receive
--
libpfm4
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|
From: seranian <ser...@us...> - 2024-04-11 15:39:34
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 72866cbc2666820d87ebc0af3b1a16d1d5db6965 (commit)
from 33513ef78f0d81edb277e0d0fd16411abb161297 (commit)
Those revisions listed above that are new to this repository have
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commit 72866cbc2666820d87ebc0af3b1a16d1d5db6965
Author: Stephane Eranian <er...@gm...>
Date: Thu Apr 11 08:36:50 2024 -0700
fix duplicate event code for Intel SPR TOPDOWN.BAD_SPEC_SLOTS
Was using same encoding as TOPDOWN.SLOTS.
Fix by adding the proper event code (0xa4) and code override
flag.
Reported-by: <la...@gm...>
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
lib/events/intel_spr_events.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
hooks/post-receive
--
libpfm4
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From: seranian <ser...@us...> - 2024-03-20 07:25:33
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 33513ef78f0d81edb277e0d0fd16411abb161297 (commit)
via e943f891e9f1d63c4b55bac051ca7b2b3979b25f (commit)
via 10b8044a90ba512be2b10e9425330e989cc22d01 (commit)
from f517f1ec8038de00ce8f5fefeeef704e24aa08ae (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 33513ef78f0d81edb277e0d0fd16411abb161297
Author: Stephane Eranian <er...@gm...>
Date: Thu Jan 18 21:55:46 2024 -0800
Add Intel SapphireRapids uncore PMU support for CHA
Adds the Coherence and Home Agent (CHA) for Intel SapphireRapids.
Based on Intel JSON events v1.17 published from
github.com/intel/perfmon/SPR
Signed-off-by: Stephane Eranian <er...@gm...>
commit e943f891e9f1d63c4b55bac051ca7b2b3979b25f
Author: Stephane Eranian <er...@gm...>
Date: Mon Jan 15 17:10:28 2024 -0800
Add Intel SapphireRapids uncore PMU support for UPI
Adds the Ultra Path Interconnect PMU (UPI) for Intel SapphireRapids.
Based on Intel JSON events v1.17 published from
github.com/intel/perfmon/SPR
Signed-off-by: Stephane Eranian <er...@gm...>
commit 10b8044a90ba512be2b10e9425330e989cc22d01
Author: Stephane Eranian <er...@gm...>
Date: Fri Jan 12 21:55:04 2024 -0800
Add Intel SapphireRapids uncore PMU support for IMC
Adds the memory controller PMU (IMC) for SapphireRapids.
Based on Intel JSON events v1.17 published from
github.com/intel/perfmon/SPR
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
docs/Makefile | 5 +-
...el_icx_unc_cha.3 => libpfm_intel_spr_unc_cha.3} | 14 +-
...el_icx_unc_imc.3 => libpfm_intel_spr_unc_imc.3} | 12 +-
...el_icx_unc_upi.3 => libpfm_intel_spr_unc_upi.3} | 12 +-
include/perfmon/pfmlib.h | 80 +
lib/Makefile | 6 +
lib/events/intel_spr_unc_cha_events.h | 2879 ++++++++++++++++++++
...unc_imc_events.h => intel_spr_unc_imc_events.h} | 916 +++----
...unc_upi_events.h => intel_spr_unc_upi_events.h} | 319 +--
lib/pfmlib_common.c | 76 +
lib/pfmlib_intel_snbep_unc.c | 23 +
lib/pfmlib_intel_snbep_unc_priv.h | 4 +
...el_icx_unc_cha.c => pfmlib_intel_spr_unc_cha.c} | 58 +-
...el_icx_unc_imc.c => pfmlib_intel_spr_unc_imc.c} | 20 +-
...el_icx_unc_upi.c => pfmlib_intel_spr_unc_upi.c} | 20 +-
lib/pfmlib_priv.h | 78 +
tests/validate_x86.c | 567 ++++
17 files changed, 4317 insertions(+), 772 deletions(-)
copy docs/man3/{libpfm_intel_icx_unc_cha.3 => libpfm_intel_spr_unc_cha.3} (70%)
copy docs/man3/{libpfm_intel_icx_unc_imc.3 => libpfm_intel_spr_unc_imc.3} (64%)
copy docs/man3/{libpfm_intel_icx_unc_upi.3 => libpfm_intel_spr_unc_upi.3} (68%)
create mode 100644 lib/events/intel_spr_unc_cha_events.h
copy lib/events/{intel_icx_unc_imc_events.h => intel_spr_unc_imc_events.h} (53%)
copy lib/events/{intel_icx_unc_upi_events.h => intel_spr_unc_upi_events.h} (67%)
copy lib/{pfmlib_intel_icx_unc_cha.c => pfmlib_intel_spr_unc_cha.c} (81%)
copy lib/{pfmlib_intel_icx_unc_imc.c => pfmlib_intel_spr_unc_imc.c} (86%)
copy lib/{pfmlib_intel_icx_unc_upi.c => pfmlib_intel_spr_unc_upi.c} (86%)
hooks/post-receive
--
libpfm4
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From: seranian <ser...@us...> - 2024-03-01 07:23:11
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via f517f1ec8038de00ce8f5fefeeef704e24aa08ae (commit)
from 816bb547f8997b84f7ef70bb99420f40dc8a984d (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit f517f1ec8038de00ce8f5fefeeef704e24aa08ae
Author: Stephane Eranian <er...@gm...>
Date: Thu Feb 29 23:07:21 2024 -0800
add CONFIG_PFMLIB_NOTRACEPOINT to speedup libpfm4 initialization
When pfmlib_initialize() is run as root and if the debugs is mounted,
then the library parses all the tracepoints to add them to the perf PMU.
Depending on the number of tracepoints, this can take a significant amount
of time even though this may not be needed if no tracepoints is passed.
In order to speedup pfm_initialize(), the patch adds a compile-time option
to disable support for tracepoint in the perf PMU.
To deactivate tracepoint support: make CONFIG_PFMLIB_NOTRACEPOINT=y
The default build is unchanged with tracepoints enabled. This patch
adds an opt-out option.
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
config.mk | 6 +++
lib/pfmlib_perf_event_pmu.c | 105 +++++++++++++++++++++++---------------------
2 files changed, 62 insertions(+), 49 deletions(-)
hooks/post-receive
--
libpfm4
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From: seranian <ser...@us...> - 2024-02-29 04:42:57
|
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "libpfm4".
The branch, master has been updated
via 816bb547f8997b84f7ef70bb99420f40dc8a984d (commit)
via 8fa4467ffa7014ed8f1525783b5919b80117beca (commit)
via e84a9563f4c93dc6e530dfa55d61b150fbf51510 (commit)
via 9410619f922facca7dab2406c58fe41a8dd61529 (commit)
via 2441b263f6f28c0fe80f8cee62cd2e64d75cd433 (commit)
via 9669e0d696a98b8b5655186dda8b457113cb0ba2 (commit)
via b7307408ddb1548271983d1fd7c4f17287d2dc0e (commit)
from 0d4ed0e7b09338e1bb1ab9153beab030c52570fe (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
commit 816bb547f8997b84f7ef70bb99420f40dc8a984d
Author: Stephane Eranian <er...@gm...>
Date: Mon Feb 26 22:39:49 2024 -0800
add Intel Raptorlake PMU support
Enables support for Raptorlake, Raptorlake P, Raptorlake S.
Signed-off-by: Stephane Eranian <er...@gm...>
commit 8fa4467ffa7014ed8f1525783b5919b80117beca
Author: Stephane Eranian <er...@gm...>
Date: Mon Feb 19 22:58:17 2024 -0800
Add Intel AlderLake Gracemont (E-Core) core PMU support
Adds core PMU support for Alderlake E-core (gracemont).
Based on Intel JSON events v1.24 published from
github.com/intel/perfmon/ADL
Signed-off-by: Stephane Eranian <er...@gm...>
commit e84a9563f4c93dc6e530dfa55d61b150fbf51510
Author: Stephane Eranian <er...@gm...>
Date: Wed Feb 14 23:09:49 2024 -0800
Add Intel AlderLake Goldencove (P-Core) core PMU support
Adds core PMU support for Alderlake P-core (goldencove).
Based on Intel JSON events v1.24 published from
github.com/intel/perfmon/ADL
Signed-off-by: Stephane Eranian <er...@gm...>
commit 9410619f922facca7dab2406c58fe41a8dd61529
Author: Stephane Eranian <er...@gm...>
Date: Tue Feb 20 23:22:47 2024 -0800
update task.c example to handle hybrid
Cannot group event if they do not belong to the same hardware PMU.
Signed-off-by: Stephane Eranian <er...@gm...>
commit 2441b263f6f28c0fe80f8cee62cd2e64d75cd433
Author: Stephane Eranian <er...@gm...>
Date: Wed Feb 28 20:08:30 2024 -0800
add INTEL_X86_CODE_DUP event flag for Intel PMUs
To handle the case where two events shared the same code and none
is because of deprecation. In order to pass validation both events
with the same code must have that flag set.
Signed-off-by: Stephane Eranian <er...@gm...>
commit 9669e0d696a98b8b5655186dda8b457113cb0ba2
Author: Stephane Eranian <er...@gm...>
Date: Mon Feb 19 22:48:44 2024 -0800
Add support for deprecated events for Intel X86 PMUs
Adds INTEL_X86_DEPRECATED flag to Intel X86 events.
Deprecated in this context means there is a newer event
monitoring the same condition. This is used to mark events
as deprecated and avoid detecting duplicate event codes.
Signed-off-by: Stephane Eranian <er...@gm...>
commit b7307408ddb1548271983d1fd7c4f17287d2dc0e
Author: Stephane Eranian <er...@gm...>
Date: Tue Feb 13 21:58:11 2024 -0800
fix Intel IcelakeX uncore PCU PMU man page typo
Was referring to eRP clockticks instead of PCU clockticks.
Signed-off-by: Stephane Eranian <er...@gm...>
-----------------------------------------------------------------------
Summary of changes:
README | 3 +
docs/Makefile | 2 +
.../{libpfm_intel_spr.3 => libpfm_intel_adl_glc.3} | 58 +-
docs/man3/libpfm_intel_adl_grt.3 | 68 +
docs/man3/libpfm_intel_icx_unc_pcu.3 | 2 +-
include/perfmon/pfmlib.h | 3 +
lib/Makefile | 3 +
.../{intel_spr_events.h => intel_adl_glc_events.h} | 3220 +++++++++-----------
lib/events/intel_adl_grt_events.h | 1078 +++++++
lib/pfmlib_common.c | 2 +
lib/{pfmlib_intel_spr.c => pfmlib_intel_adl.c} | 72 +-
lib/pfmlib_intel_x86.c | 2 +-
lib/pfmlib_intel_x86_priv.h | 2 +
lib/pfmlib_priv.h | 2 +
perf_examples/task.c | 5 +-
tests/validate_x86.c | 101 +
16 files changed, 2757 insertions(+), 1866 deletions(-)
copy docs/man3/{libpfm_intel_spr.3 => libpfm_intel_adl_glc.3} (50%)
create mode 100644 docs/man3/libpfm_intel_adl_grt.3
copy lib/events/{intel_spr_events.h => intel_adl_glc_events.h} (58%)
create mode 100644 lib/events/intel_adl_grt_events.h
copy lib/{pfmlib_intel_spr.c => pfmlib_intel_adl.c} (72%)
hooks/post-receive
--
libpfm4
|