I would like to follow up on a message I posted a couple of weeks ago
concerning the issue of leaking information from one thread to another
due to lazy restore of the context switch code.
I had mentioned a possible solution was to provide a dependent bitmask
for each PMD. Well, I did implement this solution and it is now in the GIT
To make the change effective however, the mapping tables need to be updated
to provide the new dependency information. I have tested this on Intel Core
but I cannot do this for all PMU models out there. Note the existing code will
continue to work even without the updated dependency information.
The GIT tree contains the example for the Intel Core processor. There is
a new dep_pmcs bitvector which you can initialize for each PMD register.
If touching PMDx implies using PMCy and PMCz, then in dep_pmcs you need
to set bits y and z. Make sure you cover everything. It is better to
over do it than
For instance on Intel Core, each generic counter PMD0, PMD1 depends on
its counter-part PMC0, PMC1. Thus for PMD0.dep_pmcs = 1<<0, and for
PMD1.dep_pmcs = 1 << 1. But the fixed counters, PMD16-PMD18 all
depend on the same PMC16, thus PMD16.dep_pmcs = 1 << 16, same
thing for PMD17 and PMD18.
Best way to do this cleanly, it is use macros in each PMU description module.
Hopefully, I made this clear enough that you can handle your PMU model.
Get latest updates about Open Source Projects, Conferences and News.