Re: [perfmon2] L1 data cache misses on Pentium 4
Status: Beta
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From: Philip M. <mu...@cs...> - 2007-12-12 12:31:52
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Hi Kenneth, We've tried various combinations of this metric over time and we finally gave up. We were testing it with an app where we knew the footprint and the numbers were way off at all problem sizes. Even taking into account prefetching and speculations, we still couldn't get the numbers to match. If you solve this one, we'll give you a star on the PAPI walk of fame... Phil On Dec 10, 2007, at 4:16 PM, Kenneth Hoste wrote: > Hello, > > I know this has come up before on this list, but this time I'm > determined to solve this mystery :-) > > Could somebody point me to some documentation or previous attemps > to get reasonable counts for L1 data cache misses on Pentium4? > I'd like to see what people have tried in the past, what their > reasoning was and why they concluded the counts they were getting > were wrong... > > That way, I can see where the errors have slipped in (maybe in the > Intel documentation itself, as it was the case with the > instr_completed event). > > greetings, > > Kenneth > > -- > > Computer Science is no more about computers than astronomy is about > telescopes. (E. W. Dijkstra) > > Kenneth Hoste > ELIS - Ghent University > email: ken...@el... > blog: http://www.elis.ugent.be/~kehoste/blog > website: http://www.elis.ugent.be/~kehoste > > ---------------------------------------------------------------------- > --- > SF.Net email is sponsored by: > Check out the new SourceForge.net Marketplace. > It's the best place to buy or sell services for > just about anything Open Source. > http://sourceforge.net/services/buy/ > index.php_______________________________________________ > perfmon2-devel mailing list > per...@li... > https://lists.sourceforge.net/lists/listinfo/perfmon2-devel |