The FUJITSU-MONAKA PMU events have been changed to match the v1.1 specification and v1.0 errata.
FUJITSU-MONAKA Specification URL:
https://github.com/fujitsu/FUJITSU-MONAKA
The changed events are as follows:
Removed events:
- L2D_CACHE_REFILL_L3D_MISS_PFTGT_HIT
Added events:
- ASE_FP_VREDUCE_SPEC
- SVE_FP_PREDUCE_SPEC
- ASE_FP_BF16_MIN_SPEC
- ASE_FP_FP8_MIN_SPEC
- ASE_SVE_FP_BF16_MIN_SPEC
- ASE_SVE_FP_FP8_MIN_SPEC
- SVE_FP_BF16_MIN_SPEC
- SVE_FP_FP8_MIN_SPEC
- FP_BF16_MIN_SPEC
- FP_FP8_MIN_SPEC
- FP_BF16_FIXED_MIN_OPS_SPEC
- FP_FP8_FIXED_MIN_OPS_SPEC
- FP_BF16_SCALE_MIN_OPS_SPEC
- FP_FP8_SCALE_MIN_OPS_SPEC
Renamed events:
- L2D_CACHE_REFILL_L3D_MISS_PFTGT_HIT_DM => L2D_CACHE_REFILL_L3D_MISS_DM_PFTGT_HIT
- L2D_CACHE_REFILL_L3D_MISS_PFTGT_HIT_DM_RD => L2D_CACHE_REFILL_L3D_MISS_DM_RD_PFTGT_HIT
- L2D_CACHE_REFILL_L3D_MISS_PFTGT_HIT_DM_WR => L2D_CACHE_REFILL_L3D_MISS_DM_WR_PFTGT_HIT
- L2D_CACHE_REFILL_L3D_MISS_L_MEM => L2D_CACHE_REFILL_L3D_MISS_DM_L_MEM
- L2D_CACHE_REFILL_L3D_MISS_FR_MEM => L2D_CACHE_REFILL_L3D_MISS_DM_FR_MEM
- L2D_CACHE_REFILL_L3D_MISS_L_L2 => L2D_CACHE_REFILL_L3D_MISS_DM_L_L2
- L2D_CACHE_REFILL_L3D_MISS_NR_L2 => L2D_CACHE_REFILL_L3D_MISS_DM_NR_L2
- L2D_CACHE_REFILL_L3D_MISS_NR_L3 => L2D_CACHE_REFILL_L3D_MISS_DM_NR_L3
- L2D_CACHE_REFILL_L3D_MISS_FR_L2 => L2D_CACHE_REFILL_L3D_MISS_DM_FR_L2
- L2D_CACHE_REFILL_L3D_MISS_FR_L3 => L2D_CACHE_REFILL_L3D_MISS_DM_FR_L3
Description changed events:
- STALL_BACKEND
- LL_CACHE_MISS_RD
- L2D_CACHE_RD
- L2D_CACHE_WR
- L2D_CACHE_REFILL_RD
- L2D_CACHE_REFILL_WR
- CSDB_SPEC
- EXC_SMC
- FP_MV_SPEC
- IEL_SPEC
- IREG_SPEC
- BC_LD_SPEC
- LD_COMP_WAIT
- LD_COMP_WAIT_EX
- L1_PIPE_COMP_GATHER_2FLOW
- L1_PIPE_COMP_GATHER_1FLOW
- L1_PIPE_COMP_GATHER_0FLOW
- L2D_CACHE_HWPRF_ADJACENT
- L2D_CACHE_REFILL_L3D_CACHE_PRF
- L2D_CACHE_REFILL_L3D_CACHE_HWPRF
- L2D_CACHE_REFILL_L3D_MISS_PRF
- L2D_CACHE_REFILL_L3D_MISS_HWPRF
- L2D_CACHE_REFILL_L3D_HIT_PRF
- L2D_CACHE_REFILL_L3D_HIT_HWPRF
- L1I_TLB_REFILL_4K
- L1I_TLB_REFILL_64K
- L1I_TLB_REFILL_2M
- L1I_TLB_REFILL_32M
- L1I_TLB_REFILL_512M
- L1I_TLB_REFILL_1G
- L1I_TLB_REFILL_16G
- L1D_TLB_REFILL_4K
- L1D_TLB_REFILL_64K
- L1D_TLB_REFILL_2M
- L1D_TLB_REFILL_32M
- L1D_TLB_REFILL_512M
- L1D_TLB_REFILL_1G
- L1D_TLB_REFILL_16G
- L2I_TLB_REFILL_4K
- L2I_TLB_REFILL_64K
- L2I_TLB_REFILL_2M
- L2I_TLB_REFILL_32M
- L2I_TLB_REFILL_512M
- L2I_TLB_REFILL_1G
- L2I_TLB_REFILL_16G
- L2D_TLB_REFILL_4K
- L2D_TLB_REFILL_64K
- L2D_TLB_REFILL_2M
- L2D_TLB_REFILL_32M
- L2D_TLB_REFILL_512M
- L2D_TLB_REFILL_1G
- L2D_TLB_REFILL_16G
- L2D_CACHE_LMISS_RD
- L3D_CACHE_LMISS_RD
- ASE_INST_SPEC
- ASE_SVE_INST_SPEC
- UOP_SPEC
- ASE_SVE_FP_SPEC
- ASE_SVE_FP_HP_SPEC
- ASE_SVE_FP_SP_SPEC
- ASE_SVE_FP_DP_SPEC
- ASE_SVE_FP_DIV_SPEC
- ASE_SVE_FP_SQRT_SPEC
- FP_FMA_SPEC
- ASE_SVE_FP_FMA_SPEC
- FP_MUL_SPEC
- ASE_SVE_FP_MUL_SPEC
- FP_ADDSUB_SPEC
- ASE_SVE_FP_ADDSUB_SPEC
- ASE_FP_RECPE_SPEC
- SVE_FP_RECPE_SPEC
- ASE_SVE_FP_RECPE_SPEC
- ASE_SVE_FP_CVT_SPEC
- SVE_FP_AREDUCE_SPEC
- ASE_FP_PREDUCE_SPEC
- ASE_SVE_FP_VREDUCE_SPEC
- ASE_INT_SPEC
- SVE_INT_SPEC
- ASE_SVE_INT_SPEC
- ASE_SVE_INT_MUL_SPEC
- SVE_INT_MULH64_SPEC
- NONFP_SPEC
- ASE_NONFP_SPEC
- SVE_NONFP_SPEC
- ASE_SVE_NONFP_SPEC
- ASE_SVE_INT_VREDUCE_SPEC
- ASE_SVE_LD_SPEC
- ASE_SVE_ST_SPEC
- ASE_SVE_LD_MULTI_SPEC
- ASE_SVE_ST_MULTI_SPEC
- FP_SCALE_OPS_SPEC
- FP_FIXED_OPS_SPEC
- FP_HP_SCALE_OPS_SPEC
- FP_HP_FIXED_OPS_SPEC
- FP_SP_SCALE_OPS_SPEC
- FP_SP_FIXED_OPS_SPEC
- FP_DP_SCALE_OPS_SPEC
- FP_DP_FIXED_OPS_SPEC
- L1I_CACHE_HWPRF
- L1D_CACHE_HWPRF
- L2D_CACHE_HWPRF
- STALL_BACKEND_L2D
- L1I_CACHE_REFILL_HWPRF
- L1D_CACHE_REFILL_HWPRF
- L2D_CACHE_REFILL_HWPRF
- L2D_CACHE_HIT_RD
- L2D_CACHE_HIT_WR
- L2D_CACHE_HIT
- L1I_CACHE_PRF
- L1D_CACHE_PRF
- L2D_CACHE_PRF
- L1I_CACHE_REFILL_PRF
- L1D_CACHE_REFILL_PRF
- L2D_CACHE_REFILL_PRF
- L1D_CACHE_REFILL_PERCYC
- L2D_CACHE_REFILL_PERCYC
- L1I_CACHE_REFILL_PERCYC
Signed-off-by: Kotaro, Tokai <fj0635gf@...>
Kotaro, Tokai
