libpfm4 Log


Commit Date  
[0b9c2b] by Stephane Eranian Stephane Eranian

fix swig gcc compiles

by overriding the CLFAGS

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-08-04 20:34:00 Tree
[54d7e8] by Stephane Eranian Stephane Eranian

make L2_RQSTS umasks more consistent

RFO_HITS => RFO_HIT

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-08-04 00:00:08 Tree
[aff07e] by Stephane Eranian Stephane Eranian

Make some umasks names more consistent

TAKEN_RETURN_NEAR => TAKEN_NEAR_RETURN
ALL_CONDITIONAL => ALL_CONF

looks more natural that way.

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-08-03 23:54:06 Tree
[53a8a6] by Stephane Eranian Stephane Eranian

add ARM A15 validation tests

Test basic events and priv levels.

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-03-02 17:59:12 Tree
[f3d940] by Stephane Eranian Stephane Eranian

add support for ARM A15 processor

Thanks to Will Deacon @ ARM for providing the raw event table.

Based on Cortex-A15 Technical Reference Manual rev r2p0,
section 11.6.

ARM A15 introduces priv level mask: u, k, hv.

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-03-02 17:57:39 Tree
[51a289] by Stephane Eranian Stephane Eranian

fix install target

Must skip ldconfig when not operating as root so we
pass LDCONFIG=true to make ldconfig a nop.

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-08-01 18:14:57 Tree
[29f6c5] by Stephane Eranian Stephane Eranian

fix SWIG warning on mmap_page rdmpc cap struct

Needs named bitfield

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-08-01 18:14:12 Tree
[366bc3] by Stephane Eranian Stephane Eranian

add target to build static library and examples

$ make static

is a shortcut for:

$ make CONFIG_PFMLIB_SHARED=n

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-07-31 16:34:15 Tree
[b682dc] by Stephane Eranian Stephane Eranian

fix description for CPU_CLK_UNHALTED on SNB and IVB

Signed-off-by: Stephane Eranian <eranian@google.com>

2012-07-25 17:01:24 Tree
[29b2db] by Stephane Eranian Stephane Eranian

add rdpmc fields to struct mmap_page

Based on 3.5.0-rc7.

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-07-20 00:37:48 Tree
[1ad1a8] by Stephane Eranian Stephane Eranian

fix some of the Coverity warnings

Fix some of the warnings reported by Will
Cohen when he used the Coverity tool.

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-06-28 15:50:52 Tree
[cab342] by Stephane Eranian Stephane Eranian

enable uncore PMU support for Intel Nehalem and Westmere

Requires 3.5.0-rc3 or later.

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-06-21 21:37:44 Tree
[668d9c] by Stephane Eranian Stephane Eranian

fix 32-bit compilation error with bitfield

Split 61 bit bitfield into 32 + 29 to avoid problems
in 32-bit mode.

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-06-20 10:13:44 Tree
[02cffa] by Stephane Eranian Stephane Eranian

disambiguate modifier and umask with the same name

There was a problem when a umask and modifier had
the same name. The parser could not tell them apart.

This patch fixes this. The disambiguation uses the =
sign. For boolean modifiers, simply force the value
with i=0 or i=1: L2_LINES_IN:I:I=1 or, L2_LINES_IN:I:I=0

Add the tests to validate this as well.

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-06-18 23:48:25 Tree
[e893c0] by Stephane Eranian Stephane Eranian

enable encoding on Nehalem uncore events

This is based on the LKML patch series
posted here https://lkml.org/lkml/2012/6/12/31.
We are fairly condifent that is the way things
are eventually going to be published and in particular
how how discovers the attr->type for the uncore PMU.

Note that this patch does not completely enables encodings
as the pmu->perf_name needs to be set appropriately in
the pfmlib_pmu struct first. This is addressed in a distinct
patch.

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-06-18 13:09:43 Tree
[ba7d4b] by Stephane Eranian Stephane Eranian

add perf_name to pfmlib_pmu

To prepare for dynamic PMU type for perf_events.

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-06-18 10:15:03 Tree
[af420a] by Stephane Eranian Stephane Eranian

fix encoding of NHM uncore fixed events

Need to use the right bit position for
fixed vs. generic counter.

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-06-18 10:13:08 Tree
[e0b3cf] by Stephane Eranian Stephane Eranian

add INTEL_X86_FIXED flag

To mark events that are fixed counter only.

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-06-18 09:57:59 Tree
[3558dd] by Stephane Eranian Stephane Eranian

init supported_plm for perf PMU dynamically

The perf PMU is the geenric perf_evnet PMU.
it corresponds to all the perf_event hardware
events such as cycles, instructions. This is
a pseudo PMU. But when it comes to priv levels,
the behavior across physical PMU changes. The
kernl layer does not respond in the same way to
unsupported priv levels. Libpfm does not let users
set priv levels that do not exist int he actual HW.

That means that the perf PMU needs to "fish" the
list of supported plm from the underlying core PMU.
This was done in validate_pattrs() but not during encoding
leading to generic perf events causing errors on ARM
for instance: task -e cycles ... would returen EPERM.

This patch fixes the problem, by extending the init()
callback of the perf PMU to overwrite its default
supported_plm bitmask with the one from the underlying
core PMU, assuming there is one. That solves the problem
on ARM, for instance.

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-06-17 20:56:30 Tree
[7a0608] by Stephane Eranian Stephane Eranian

update pfm_arm_get_perf_encoding()

To use the PERF_OS_NONE encoding routine, like
other PMU models.

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-06-17 09:49:24 Tree
[fa5c08] by Stephane Eranian Stephane Eranian

fix perf_arm_display_reg() broken format

reg.val is unsigned int not unsigned long long

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-06-17 09:46:32 Tree
[f9fe4f] by William Cohen William Cohen , pushed by Stephane Eranian Stephane Eranian

use siginfo_t rather than struct siginfo

Newer versions of glibc have removed struct siginfo. The
notify_group.c and notify_self.c code still used stuct siginfo.
This patch uses the siginfo_t instead.

Signed-off-by: William Cohen <wcohen@redhat.com>

2012-06-07 20:06:53 Tree
[b621fa] by Stephane Eranian Stephane Eranian

add Intel Ivy Bridge support

Based on SDM Vol3, May 2012.
Support is included for model 58 (0x3a)

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-06-06 22:02:26 Tree
[2fddc7] by Stephane Eranian Stephane Eranian

fix SNB ILD_STALL:LCP umask code

Was same as IQ_FULL, which was wrong.

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-06-07 12:32:37 Tree
[4cc4fe] by Stephane Eranian Stephane Eranian

add perf_events excl modifier

To request exlcusive access to PMU for the event.
This is a boolean modifier.

$ task -e unhalted_core_cycles:excl ....

Signed-off-by: Stephane Eranian <eranian@gmail.com>

2012-06-01 20:04:18 Tree
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