This is an implementation of the powerpc LE mode. It
takes into account the low-3 address line xor as
described on page 124 of book I. The change is rather
extensive in CPU because there are a lot of direct
accesses to the memory array. My little-endian test
code works as expected. I believe that the IO
treatment is correct because the IO devices are outside
the CPU and thus observe the switched addresses.
patch for little-endian support