[Pcb-src-changes] CVS commit:pcb/src

[Ben J. <bj...@us...>]

Module Name:	pcb
Committed By:	bjj
Date:		Thu Jan  3 05:01:59 UTC 2008

Modified Files:
	pcb/src: parse_y.y

Log Message:
Temporarily change PCB=yyPCB while InitClip after load
(similar hacks exist in other load code)


To generate a diff of this commit:
cvs rdiff -r1.41 -r1.42 pcb/src/parse_y.y

To view the diffs online visit:
http://pcb.cvs.sourceforge.net/pcb/pcb/src/parse_y.y?r1=1.41&r2=1.42

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.