From: DJ D. <69...@bu...> - 2011-08-28 17:25:54
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We already have "too close to hole" warnings, I think forcing holes to *never* touch active nets is too restrictive. But, we can rediscuss that issue if/when we rewrite DRC :-) -- You received this bug notification because you are a member of PCB Bug Team, which is subscribed to pcb. https://bugs.launchpad.net/bugs/699499 Title: Better handling of unplated vias Status in PCB: Printed Circuit Board CAD package: Fix Committed Bug description: The attached patch adds checks in the geometry intersection functions to no longer treat unplated vias (mounting holes) as conducting. The implementation in the patch will act as if the unplated via doesn't intersect with metal objects at all, which is possibly not what is desired. Should the conductivity check happen on a higher level from the geometry intersection routines? A case that would require this is not obvious to me. To manage notifications about this bug go to: https://bugs.launchpad.net/pcb/+bug/699499/+subscriptions |