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OS561/Minon/Kodek / News: Recent posts

Changes In Design Relevant

1. New Bias Element Structure
It seems that 32 bits is sufficient for 4:1 bias and so this new structure is planned to be used http://jaxonix.blogspot.com

2. Minon Port Hardware
Will places changes in design to have a single way mux rarther than 4 way mux per 4 port pair. This requires a simple co-processor on board but allow greater flexibility.

3. Minon instruction Set
possible changes here due to the more compact representation of 32 bits for a compressed kodek.... read more

Posted by Jacko 2005-07-16

Level 1 Block Format

Level 1 format support defined.
Currently thinking of level 2 feature of dynamic class loading from archive, for environments supporting class loader modification.

Posted by Jacko 2005-05-01

Patent Description Online

The filed patent description is now online as a GLPL public patent. Additions relating to the diamond algorithm bias element have yet to be included. I may also be interested in publishing patent pending titled boxkey cryptographic decoder, for set top box applications if there is enough interest.

Posted by Jacko 2005-04-21

OS561 Framework Vision

Details in project docs. Read about the reasoning behind the the core classes, and about the expected bootstrap process.

Posted by Jacko 2005-04-09

Minon Instruction Set Defined

The project documentation defines the instruction set for the Minon VHDL chip design.

Posted by Jacko 2005-03-17