From: John L. <mov...@us...> - 2004-12-12 23:27:04
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Update of /cvsroot/oprofile/oprofile/events/mips/vr5500 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv11062/events/mips/vr5500 Added Files: events unit_masks Log Message: MIPS support, some check_style.py fixes --- NEW FILE: events --- # # VR5500, VR5532 and VR7701 events # # Very similar to what the VR5432 provides. # event:0 counters:0,1 um:zero minimum:500 name:CYCLES : Processor clock cycles event:1 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS_EXECUTED : Instructions executed event:2 counters:0,1 um:zero minimum:500 name:LOAD_PREF_CACHE_INSTRUCTIONS : Execution of load/prefetch/cache instruction event:3 counters:0,1 um:zero minimum:500 name:STORES : Execution of store instruction event:4 counters:0,1 um:zero minimum:500 name:BRANCHES : Execution of branch instruction event:5 counters:0,1 um:zero minimum:500 name:FP_INSTRUCTIONS : Execution of floating-point instruction event:6 counters:0,1 um:zero minimum:500 name:DOUBLEWORDS_FLUSHED : Doubleword flush to main memory event:7 counters:0,1 um:zero minimum:500 name:JTLB_REFILLS : TLB refill event:8 counters:0,1 um:zero minimum:500 name:DCACHE_MISSES : Data cache miss event:9 counters:0,1 um:zero minimum:500 name:ICACHE_MISSES : Instruction cache miss event:10 counters:0,1 um:zero minimum:500 name:BRANCHES_MISPREDICTED : Branch prediction miss --- NEW FILE: unit_masks --- # # MIPS VR5500 possible unit masks # name:zero type:mandatory default:0x0 0x0 No unit mask |