Hi All,

 

I am trying to get the ARM CA9 PMU working with the Linux kernel (version 3.7.0) I have the PMU partially setup by adding the PMU to the device tree with the core sight interrupt numbers. I see access to the PMU registers with oprofile via DS-5 (ARM debugger) when I run some code to profile such as a benchmark.

 

However, I still can't get sample data back. The PMU interrupt numbers below in the device tree snippet are the CoreSight interrupts,

however when I check the General Interrupt Controller (GIC registers) to see if the interrupts are enabled it shows that they are  not (all zeros).

 

I now realize that I need to setup the Cross-Trigger-Interface (CTI) and Cross Trigger Module/Matrix (CTM) to get the interrupts working with the GIC.

 

I am seeing some great community support for ARM/Oprofile that wasn’t there a few years ago. So I was wondering if there was easier way to configure the kernel code to enable the CTI/CTM? I saw some device tree mapping in ARM’s versatile express kernel pushes that may suggest that there is an easy way to map CTI/CTM to the GIC?

 

Thanks for your time and help.

 

Jeff

 

 

 

 

 

 

 



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