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#281 Power8: a few event misspellings with ophelp
The following events include "REF", but should instead be "REJ" as in "reject".
As reported by ophelp:
< PM_ISU_REF_FX0,30AC
< PM_ISU_REF_FX1,30AE
< PM_ISU_REF_LS0,30B0
< PM_ISU_REF_LS1,30B2
< PM_ISU_REF_LS2,30B4
< PM_ISU_REF_LS3,30B6
Correct:
PM_ISU_REJ_FX0,30AC
PM_ISU_REJ_FX1,30AE
PM_ISU_REJ_LS0,30B0
PM_ISU_REJ_LS1,30B2
PM_ISU_REJ_LS2,30B4
PM_ISU_REJ_LS3,30B6
The following patch has been checked in to address this issue
commit 6fcd5aa57482a58fcb0166982fed517fbf7040fb
Author: Carl E. Love cel@us.ibm.com
Date: Thu Mar 17 13:49:41 2016 -0700
POWER 8 processor event spelling fixes Will: Here is a patch to fix the spelling errors in the Power 8 events. See OProfile bugzilla number 281. This patch corrects the spelling errors. Carl Love ------------------------------------------------------------ POWER 8 processor event spelling fixes. Fixed the spelling of six of the events. Signed-off-by: Carl E. Love <carll@oc4738070240.ibm.com>I just checked out latest git, built, and the original 6 reported are indeed fixed. However, I'm wondering if I missed one, as one of these things is not like the others:
$ ophelp | grep PM_ISU_RE
PM_ISU_REJ_FX0: (counter: 0, 1, 2, 3)
PM_ISU_REJ_FX1: (counter: 0, 1, 2, 3)
PM_ISU_REF_FXU: (counter: 0, 1, 2, 3)
PM_ISU_REJ_LS0: (counter: 0, 1, 2, 3)
PM_ISU_REJ_LS1: (counter: 0, 1, 2, 3)
PM_ISU_REJ_LS2: (counter: 0, 1, 2, 3)
PM_ISU_REJ_LS3: (counter: 0, 1, 2, 3)
PM_ISU_REJECTS_ALL: (counter: 0, 1, 2, 3)
PM_ISU_REJECT_RES_NA: (counter: 0, 1, 2, 3)
PM_ISU_REJECT_SAR_BYPASS: (counter: 0, 1, 2, 3)
PM_ISU_REJECT_SRC_NA: (counter: 0, 1, 2, 3)
PM_ISU_REJ_VS0: (counter: 0, 1, 2, 3)
PM_ISU_REJ_VS1: (counter: 0, 1, 2, 3)
PM_ISU_REJ_VSU: (counter: 0, 1, 2, 3)
The published list of events at:
http://www.ibm.com/support/knowledgecenter/SSFK5S_2.1.0/com.ibm.cluster.pedev.v2r1.pedev100.doc/bl7ug_power8metrics.htm
has the event name listed PM_ISU_REF_FXU
Group 231
Event Description
PM_CLB_HELD CLB Hold: Any Reason
PM_LINK_STACK_INVALID_PTR A flush were LS ptr is invalid, results in a pop , A lot of interrupts between push and pops
PM_LINK_STACK_WRONG_ADD_PRED Link stack predicts wrong address, because of link stack design limitation
PM_ISU_REF_FXU FXU ISU reject from either pipe
PM_RUN_INST_CMPL Run instructions
PM_RUN_CYC Run cycles
I searched the document and did not find a PM_ISU_REJ_FXU event listed. So I think we have the event name correct.
I believe this issue can be closed?
Fixed by the following patch that is in oprofile-1.2.0:
commit 6fcd5aa57482a58fcb0166982fed517fbf7040fb
Author: Carl E. Love cel@us.ibm.com
Date: Thu Mar 17 13:49:41 2016 -0700
POWER 8 processor event spelling fixes Will: Here is a patch to fix the spelling errors in the Power 8 events. See OProfile bugzilla number 281. This patch corrects the spelling errors. Carl Love ------------------------------------------------------------ POWER 8 processor event spelling fixes. Fixed the spelling of six of the events. Signed-off-by: Carl E. Love <carll@oc4738070240.ibm.com>