#116 New bus type SLS UP3 (Altera FPGA board)

jtag (93)

Have added a bus and data types for use with the Altera
University program UP3 FPGA board (called ESDK
version II by SLS Corporation, see www.slscorp.com).

I have tested here to do a small Flash programming
session, reading and writing to SRAM, and to use the
jtag program to write a message on the LCD display of
the board. Tested using FreeBSD-5.4, amd64 hardware
(i386 mode), with a Byteblaster cable.

The patch also contains the definition of the Altera
Cyclone 1c6q240 FPGA chip.

The patch is relative to the cvs version as of 2005-07-30.


  • Kent Palmkvist

    Kent Palmkvist - 2005-08-01

    Patch for SLS UP3 board support

  • Marcel Telka

    Marcel Telka - 2011-07-08
    • status: open --> closed
  • Marcel Telka

    Marcel Telka - 2011-07-08

    The openwince project is no longer active.

    If this report is related to JTAG Tools, please try UrJTAG at http://urjtag.sourceforge.net/


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