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From: Branislav P. <bra...@us...> - 2005-06-16 13:14:50
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Update of /cvsroot/openwince/include/h8/h8s2357 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv30170/h8/h8s2357 Modified Files: mcu.h Log Message: 2005-06-16 Branislav Petrovsky <bra...@sz...> * h8/h8s2357/mcu.h (SBYCR, SYSCR, SCKCR, MDCR, MSTPCRH, MSTPCRL) (SYSCR2): Added assembly alternatives to C register names defines. Index: mcu.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/mcu.h,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- mcu.h 3 Jun 2005 10:07:16 -0000 1.3 +++ mcu.h 16 Jun 2005 13:14:41 -0000 1.4 @@ -81,6 +81,16 @@ #define MSTPCRL_OFFSET 0x05 #define SYSCR2_OFFSET 0x0a +#if LANGUAGE == ASM +#define SBYCR (MCU_BASE + SBYCR_OFFSET) +#define SYSCR (MCU_BASE + SYSCR_OFFSET) +#define SCKCR (MCU_BASE + SCKCR_OFFSET) +#define MDCR (MCU_BASE + MDCR_OFFSET) +#define MSTPCRH (MCU_BASE + MSTPCRH_OFFSET) +#define MSTPCRL (MCU_BASE + MSTPCRL_OFFSET) +#define SYSCR2 (MCU_BASE + SYSCR2_OFFSET) +#endif /* LANGUAGE == ASM */ + /* SBYCR bits */ #define SBYCR_SSBY bit(7) #define SBYCR_STS_MASK bits(6,4) |
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From: Branislav P. <bra...@us...> - 2005-06-16 13:14:49
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Update of /cvsroot/openwince/include In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv30170 Modified Files: ChangeLog Log Message: 2005-06-16 Branislav Petrovsky <bra...@sz...> * h8/h8s2357/mcu.h (SBYCR, SYSCR, SCKCR, MDCR, MSTPCRH, MSTPCRL) (SYSCR2): Added assembly alternatives to C register names defines. Index: ChangeLog =================================================================== RCS file: /cvsroot/openwince/include/ChangeLog,v retrieving revision 1.73 retrieving revision 1.74 diff -u -d -r1.73 -r1.74 --- ChangeLog 10 Jun 2005 08:05:37 -0000 1.73 +++ ChangeLog 16 Jun 2005 13:14:41 -0000 1.74 @@ -1,3 +1,8 @@ +2005-06-16 Branislav Petrovsky <bra...@sz...> + + * h8/h8s2357/mcu.h (SBYCR, SYSCR, SCKCR, MDCR, MSTPCRH, MSTPCRL) + (SYSCR2): Added assembly alternatives to C register names defines. + 2005-06-10 Branislav Petrovsky <bra...@sz...> * h8/h83048/itu.h: Replaced 8 bit register pairs with 16 bit registers |
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From: Branislav P. <bra...@us...> - 2005-06-10 08:05:49
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Update of /cvsroot/openwince/include In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv31566 Modified Files: ChangeLog Log Message: 2005-06-10 Branislav Petrovsky <bra...@sz...> * h8/h83048/itu.h: Replaced 8 bit register pairs with 16 bit registers TCNT, GRA, GRB, BRA, BRB. Index: ChangeLog =================================================================== RCS file: /cvsroot/openwince/include/ChangeLog,v retrieving revision 1.72 retrieving revision 1.73 diff -u -d -r1.72 -r1.73 --- ChangeLog 3 Jun 2005 14:03:48 -0000 1.72 +++ ChangeLog 10 Jun 2005 08:05:37 -0000 1.73 @@ -1,3 +1,8 @@ +2005-06-10 Branislav Petrovsky <bra...@sz...> + + * h8/h83048/itu.h: Replaced 8 bit register pairs with 16 bit registers + TCNT, GRA, GRB, BRA, BRB. + 2005-06-03 Branislav Petrovsky <bra...@sz...> * h8/h83048/sci.h (SSR_RDFR): Constant renamed to ... |
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From: Branislav P. <bra...@us...> - 2005-06-10 08:05:49
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Update of /cvsroot/openwince/include/h8/h83048 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv31566/h8/h83048 Modified Files: itu.h Log Message: 2005-06-10 Branislav Petrovsky <bra...@sz...> * h8/h83048/itu.h: Replaced 8 bit register pairs with 16 bit registers TCNT, GRA, GRB, BRA, BRB. Index: itu.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h83048/itu.h,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- itu.h 3 Jun 2005 10:07:16 -0000 1.3 +++ itu.h 10 Jun 2005 08:05:38 -0000 1.4 @@ -62,16 +62,11 @@ uint8_t tior; uint8_t tier; uint8_t tsr; - uint8_t tcnth; - uint8_t tcntl; - uint8_t grah; - uint8_t gral; - uint8_t grbh; - uint8_t grbl; - uint8_t brah; /* only ITU channel 3 and 4 */ - uint8_t bral; /* only ITU channel 3 and 4 */ - uint8_t brbh; /* only ITU channel 3 and 4 */ - uint8_t brbl; /* only ITU channel 3 and 4 */ + uint16_t tcnt; + uint16_t gra; + uint16_t grb; + uint16_t bra; /* only ITU channel 3 and 4 */ + uint16_t brb; /* only ITU channel 3 and 4 */ } ITU_registers_t; typedef volatile struct ITU_common1_registers { @@ -98,64 +93,45 @@ #define TIOR0 ITU0_pointer->tior #define TIER0 ITU0_pointer->tier #define TSR0 ITU0_pointer->tsr -#define TCNT0H ITU0_pointer->tcnth -#define TCNT0L ITU0_pointer->tcntl -#define GRA0H ITU0_pointer->grah -#define GRA0L ITU0_pointer->gral -#define GRB0H ITU0_pointer->grbh -#define GRB0L ITU0_pointer->grbl +#define TCNT0 ITU0_pointer->tcnt +#define GRA0 ITU0_pointer->gra +#define GRB0 ITU0_pointer->grb #define TCR1 ITU1_pointer->tcr #define TIOR1 ITU1_pointer->tior #define TIER1 ITU1_pointer->tier #define TSR1 ITU1_pointer->tsr -#define TCNT1H ITU1_pointer->tcnth -#define TCNT1L ITU1_pointer->tcntl -#define GRA1H ITU1_pointer->grah -#define GRA1L ITU1_pointer->gral -#define GRB1H ITU1_pointer->grbh -#define GRB1L ITU1_pointer->grbl +#define TCNT1 ITU1_pointer->tcnt +#define GRA1 ITU1_pointer->gra +#define GRB1 ITU1_pointer->grb #define TCR2 ITU2_pointer->tcr #define TIOR2 ITU2_pointer->tior #define TIER2 ITU2_pointer->tier #define TSR2 ITU2_pointer->tsr -#define TCNT2H ITU2_pointer->tcnth -#define TCNT2L ITU2_pointer->tcntl -#define GRA2H ITU2_pointer->grah -#define GRA2L ITU2_pointer->gral -#define GRB2H ITU2_pointer->grbh -#define GRB2L ITU2_pointer->grbl +#define TCNT2 ITU2_pointer->tcnt +#define GRA2 ITU2_pointer->gra +#define GRB2 ITU2_pointer->grb #define TCR3 ITU3_pointer->tcr #define TIOR3 ITU3_pointer->tior #define TIER3 ITU3_pointer->tier #define TSR3 ITU3_pointer->tsr -#define TCNT3H ITU3_pointer->tcnth -#define TCNT3L ITU3_pointer->tcntl -#define GRA3H ITU3_pointer->grah -#define GRA3L ITU3_pointer->gral -#define GRB3H ITU3_pointer->grbh -#define GRB3L ITU3_pointer->grbl -#define BRA3H ITU3_pointer->brah -#define BRA3L ITU3_pointer->bral -#define BRB3H ITU3_pointer->brbh -#define BRB3L ITU3_pointer->brbl +#define TCNT3 ITU3_pointer->tcnt +#define GRA3 ITU3_pointer->gra +#define GRB3 ITU3_pointer->grb +#define BRA3 ITU3_pointer->bra +#define BRB3 ITU3_pointer->brb #define TCR4 ITU4_pointer->tcr #define TIOR4 ITU4_pointer->tior #define TIER4 ITU4_pointer->tier #define TSR4 ITU4_pointer->tsr -#define TCNT4H ITU4_pointer->tcnth -#define TCNT4L ITU4_pointer->tcntl -#define GRA4H ITU4_pointer->grah -#define GRA4L ITU4_pointer->gral -#define GRB4H ITU4_pointer->grbh -#define GRB4L ITU4_pointer->grbl -#define BRA4H ITU4_pointer->brah -#define BRA4L ITU4_pointer->bral -#define BRB4H ITU4_pointer->brbh -#define BRB4L ITU4_pointer->brbl +#define TCNT4 ITU4_pointer->tcnt +#define GRA4 ITU4_pointer->gra +#define GRB4 ITU4_pointer->grb +#define BRA4 ITU4_pointer->bra +#define BRB4 ITU4_pointer->brb #define TSTR ITU_COMMON1_pointer->tstr #define TSNC ITU_COMMON1_pointer->tsnc @@ -170,16 +146,11 @@ #define TIOR_OFFSET 0x01 #define TIER_OFFSET 0x02 #define TSR_OFFSET 0x03 -#define TCNTH_OFFSET 0x04 -#define TCNTL_OFFSET 0x05 -#define GRAH_OFFSET 0x06 -#define GRAL_OFFSET 0x07 -#define GRBH_OFFSET 0x08 -#define GRBL_OFFSET 0x09 -#define BRAH_OFFSET 0x0a -#define BRAL_OFFSET 0x0b -#define BRBH_OFFSET 0x0c -#define BRBL_OFFSET 0x0d +#define TCNT_OFFSET 0x04 +#define GRA_OFFSET 0x06 +#define GRB_OFFSET 0x08 +#define BRA_OFFSET 0x0a +#define BRB_OFFSET 0x0c #define TSTR_OFFSET 0x00 #define TSNC_OFFSET 0x01 |
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From: Branislav P. <bra...@us...> - 2005-06-03 14:03:59
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Update of /cvsroot/openwince/include In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv29230 Modified Files: ChangeLog Log Message: 2005-06-03 Branislav Petrovsky <bra...@sz...> * h8/h83048/sci.h (SSR_RDFR): Constant renamed to ... (SSR_RDRF): ... this one. * h8/h8s2357/sci.h: Ditto. Index: ChangeLog =================================================================== RCS file: /cvsroot/openwince/include/ChangeLog,v retrieving revision 1.71 retrieving revision 1.72 diff -u -d -r1.71 -r1.72 --- ChangeLog 3 Jun 2005 10:07:16 -0000 1.71 +++ ChangeLog 3 Jun 2005 14:03:48 -0000 1.72 @@ -1,5 +1,11 @@ 2005-06-03 Branislav Petrovsky <bra...@sz...> + * h8/h83048/sci.h (SSR_RDFR): Constant renamed to ... + (SSR_RDRF): ... this one. + * h8/h8s2357/sci.h: Ditto. + +2005-06-03 Branislav Petrovsky <bra...@sz...> + * h8/h83048/adc.h: Register structures defined as volatile. * h8/h83048/dac.h: Ditto. * h8/h83048/dmac.h: Ditto. |
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From: Branislav P. <bra...@us...> - 2005-06-03 14:03:59
|
Update of /cvsroot/openwince/include/h8/h83048 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv29230/h8/h83048 Modified Files: sci.h Log Message: 2005-06-03 Branislav Petrovsky <bra...@sz...> * h8/h83048/sci.h (SSR_RDFR): Constant renamed to ... (SSR_RDRF): ... this one. * h8/h8s2357/sci.h: Ditto. Index: sci.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h83048/sci.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- sci.h 3 Jun 2005 10:07:16 -0000 1.2 +++ sci.h 3 Jun 2005 14:03:49 -0000 1.3 @@ -115,7 +115,7 @@ /* SSR bits */ #define SSR_TDRE bit(7) -#define SSR_RDFR bit(6) +#define SSR_RDRF bit(6) #define SSR_ORER bit(5) #define SSR_FER bit(4) #define SSR_ERS bit(4) |
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From: Branislav P. <bra...@us...> - 2005-06-03 14:03:59
|
Update of /cvsroot/openwince/include/h8/h8s2357 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv29230/h8/h8s2357 Modified Files: sci.h Log Message: 2005-06-03 Branislav Petrovsky <bra...@sz...> * h8/h83048/sci.h (SSR_RDFR): Constant renamed to ... (SSR_RDRF): ... this one. * h8/h8s2357/sci.h: Ditto. Index: sci.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/sci.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- sci.h 3 Jun 2005 10:07:17 -0000 1.2 +++ sci.h 3 Jun 2005 14:03:49 -0000 1.3 @@ -125,7 +125,7 @@ /* SSR bits */ #define SSR_TDRE bit(7) -#define SSR_RDFR bit(6) +#define SSR_RDRF bit(6) #define SSR_ORER bit(5) #define SSR_FER bit(4) #define SSR_ERS bit(4) |
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From: Branislav P. <bra...@us...> - 2005-06-03 10:07:29
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Update of /cvsroot/openwince/include/h8/h83048 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv1135/h8/h83048 Modified Files: adc.h dac.h dmac.h flash.h ic.h itu.h other.h ports.h rc.h sci.h tpc.h wdt.h Log Message: 2005-06-03 Branislav Petrovsky <bra...@sz...> * h8/h83048/adc.h: Register structures defined as volatile. * h8/h83048/dac.h: Ditto. * h8/h83048/dmac.h: Ditto. * h8/h83048/flash.h: Ditto. * h8/h83048/ic.h: Ditto. * h8/h83048/itu.h: Ditto. * h8/h83048/other.h: Ditto. * h8/h83048/ports.h: Ditto. * h8/h83048/rc.h: Ditto. * h8/h83048/sci.h: Ditto. * h8/h83048/tpc.h: Ditto. * h8/h83048/wdt.h: Ditto. * h8/h8s2357/adc.h: Ditto. * h8/h8s2357/bus.h: Ditto. * h8/h8s2357/dac.h: Ditto. * h8/h8s2357/dmac.h: Ditto. * h8/h8s2357/dtc.h: Ditto. * h8/h8s2357/flash.h: Ditto. * h8/h8s2357/ic.h: Ditto. * h8/h8s2357/mcu.h: Ditto. * h8/h8s2357/ports.h: Ditto. * h8/h8s2357/ppg.h: Ditto. * h8/h8s2357/sci.h: Ditto. * h8/h8s2357/timer.h: Ditto. * h8/h8s2357/tpu.h: Ditto. * h8/h8s2357/wdt.h: Ditto. Index: flash.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h83048/flash.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- flash.h 1 Jun 2005 14:15:40 -0000 1.1 +++ flash.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -51,7 +51,7 @@ #define FLASH_BASE 0xffff40 #if LANGUAGE == C -typedef struct FLASH_registers { +typedef volatile struct FLASH_registers { uint8_t flmcr; uint8_t __reserved1; uint8_t ebr1; Index: tpc.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h83048/tpc.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- tpc.h 2 Jun 2005 07:47:50 -0000 1.1 +++ tpc.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -51,7 +51,7 @@ #define TPC_BASE 0xffffa0 #if LANGUAGE == C -typedef struct TPC_registers { +typedef volatile struct TPC_registers { uint8_t tpmr; uint8_t tpcr; uint8_t nderb; Index: dac.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h83048/dac.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- dac.h 1 Jun 2005 14:15:40 -0000 1.1 +++ dac.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -51,7 +51,7 @@ #define DAC_BASE 0xffffdc #if LANGUAGE == C -typedef struct DAC_registers { +typedef volatile struct DAC_registers { uint8_t dadr0; uint8_t dadr1; uint8_t dacr; Index: wdt.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h83048/wdt.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- wdt.h 2 Jun 2005 07:47:50 -0000 1.1 +++ wdt.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -51,7 +51,7 @@ #define WDT_BASE 0xffffa8 #if LANGUAGE == C -typedef struct WDT_registers { +typedef volatile struct WDT_registers { union { union { uint16_t tcsr; Index: dmac.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h83048/dmac.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- dmac.h 1 Jun 2005 14:15:40 -0000 1.1 +++ dmac.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -51,7 +51,7 @@ #define DMAC_BASE 0xffff20 #if LANGUAGE == C -typedef struct DMAC_registers { +typedef volatile struct DMAC_registers { uint32_t mar0a; uint16_t etcr0a; uint8_t ioar0a; Index: other.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h83048/other.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- other.h 1 Jun 2005 14:15:40 -0000 1.1 +++ other.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -52,14 +52,14 @@ #define OTHER2_BASE 0xffffec #if LANGUAGE == C -typedef struct OTHER1_registers { +typedef volatile struct OTHER1_registers { uint8_t dastcr; uint8_t divcr; uint8_t mstcr; uint8_t cscr; } OTHER1_registers_t; -typedef struct OTHER2_registers { +typedef volatile struct OTHER2_registers { uint8_t abwcr; uint8_t astcr; uint8_t wcr; Index: adc.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h83048/adc.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- adc.h 1 Jun 2005 14:15:40 -0000 1.1 +++ adc.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -51,7 +51,7 @@ #define ADC_BASE 0xffffe0 #if LANGUAGE == C -typedef struct ADC_registers { +typedef volatile struct ADC_registers { uint8_t addrah; uint8_t addral; uint8_t addrbh; Index: rc.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h83048/rc.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- rc.h 2 Jun 2005 07:47:50 -0000 1.1 +++ rc.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -51,7 +51,7 @@ #define RC_BASE 0xffffac #if LANGUAGE == C -typedef struct RC_registers { +typedef volatile struct RC_registers { uint8_t rfshcr; uint8_t rtmcsr; uint8_t rtcnt; Index: sci.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h83048/sci.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- sci.h 1 Jun 2005 14:15:40 -0000 1.1 +++ sci.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -52,7 +52,7 @@ #define SCI1_BASE 0xffffb8 #if LANGUAGE == C -typedef struct SCI_registers { +typedef volatile struct SCI_registers { uint8_t smr; uint8_t brr; uint8_t scr; Index: ports.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h83048/ports.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- ports.h 1 Jun 2005 14:15:40 -0000 1.1 +++ ports.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -51,7 +51,7 @@ #define PORT_BASE 0xffffc0 #if LANGUAGE == C -typedef struct PORT_registers { +typedef volatile struct PORT_registers { uint8_t p1ddr; uint8_t p2ddr; uint8_t p1dr; Index: ic.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h83048/ic.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- ic.h 1 Jun 2005 14:15:40 -0000 1.1 +++ ic.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -51,7 +51,7 @@ #define IC_BASE 0xfffff4 #if LANGUAGE == C -typedef struct IC_registers { +typedef volatile struct IC_registers { uint8_t iscr; uint8_t ier; uint8_t isr; Index: itu.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h83048/itu.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- itu.h 2 Jun 2005 06:34:20 -0000 1.2 +++ itu.h 3 Jun 2005 10:07:16 -0000 1.3 @@ -57,7 +57,7 @@ #define ITU4_BASE 0xffff92 #if LANGUAGE == C -typedef struct ITU_registers { +typedef volatile struct ITU_registers { uint8_t tcr; uint8_t tior; uint8_t tier; @@ -74,14 +74,14 @@ uint8_t brbl; /* only ITU channel 3 and 4 */ } ITU_registers_t; -typedef struct ITU_common1_registers { +typedef volatile struct ITU_common1_registers { uint8_t tstr; uint8_t tsnc; uint8_t tmdr; uint8_t tfcr; } ITU_common1_registers_t; -typedef struct ITU_common2_registers { +typedef volatile struct ITU_common2_registers { uint8_t toer; uint8_t tocr; } ITU_common2_registers_t; |
Update of /cvsroot/openwince/include/h8/h8s2357 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv1135/h8/h8s2357 Modified Files: adc.h bus.h dac.h dmac.h dtc.h flash.h ic.h mcu.h ports.h ppg.h sci.h timer.h tpu.h wdt.h Log Message: 2005-06-03 Branislav Petrovsky <bra...@sz...> * h8/h83048/adc.h: Register structures defined as volatile. * h8/h83048/dac.h: Ditto. * h8/h83048/dmac.h: Ditto. * h8/h83048/flash.h: Ditto. * h8/h83048/ic.h: Ditto. * h8/h83048/itu.h: Ditto. * h8/h83048/other.h: Ditto. * h8/h83048/ports.h: Ditto. * h8/h83048/rc.h: Ditto. * h8/h83048/sci.h: Ditto. * h8/h83048/tpc.h: Ditto. * h8/h83048/wdt.h: Ditto. * h8/h8s2357/adc.h: Ditto. * h8/h8s2357/bus.h: Ditto. * h8/h8s2357/dac.h: Ditto. * h8/h8s2357/dmac.h: Ditto. * h8/h8s2357/dtc.h: Ditto. * h8/h8s2357/flash.h: Ditto. * h8/h8s2357/ic.h: Ditto. * h8/h8s2357/mcu.h: Ditto. * h8/h8s2357/ports.h: Ditto. * h8/h8s2357/ppg.h: Ditto. * h8/h8s2357/sci.h: Ditto. * h8/h8s2357/timer.h: Ditto. * h8/h8s2357/tpu.h: Ditto. * h8/h8s2357/wdt.h: Ditto. Index: dtc.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/dtc.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- dtc.h 31 May 2005 11:46:33 -0000 1.1 +++ dtc.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -51,7 +51,7 @@ #define DTCR_BASE 0xffffff30 #if LANGUAGE == C -typedef struct DTCR_registers { +typedef volatile struct DTCR_registers { uint8_t dtcera; uint8_t dtcerb; uint8_t dtcerc; Index: timer.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/timer.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- timer.h 2 Jun 2005 08:45:32 -0000 1.2 +++ timer.h 3 Jun 2005 10:07:17 -0000 1.3 @@ -51,7 +51,7 @@ #define TIMER_BASE 0xffffffb0 #if LANGUAGE == C -typedef struct TIMER_registers { +typedef volatile struct TIMER_registers { uint8_t tcr0; uint8_t tcr1; uint8_t tcsr0; Index: flash.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/flash.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- flash.h 27 May 2005 12:12:06 -0000 1.1 +++ flash.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -51,7 +51,7 @@ #define FLASH_BASE 0xffffffc8 #if LANGUAGE == C -typedef struct FLASH_registers { +typedef volatile struct FLASH_registers { uint8_t flmcr1; uint8_t flmcr2; uint8_t ebr1; Index: mcu.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/mcu.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- mcu.h 3 Jun 2005 06:08:43 -0000 1.2 +++ mcu.h 3 Jun 2005 10:07:16 -0000 1.3 @@ -51,7 +51,7 @@ #define MCU_BASE 0xffffff38 #if LANGUAGE == C -typedef struct MCU_registers { +typedef volatile struct MCU_registers { uint8_t sbycr; uint8_t syscr; uint8_t sckcr; Index: ppg.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/ppg.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- ppg.h 31 May 2005 06:11:00 -0000 1.1 +++ ppg.h 3 Jun 2005 10:07:17 -0000 1.2 @@ -51,7 +51,7 @@ #define PPG_BASE 0xffffff46 #if LANGUAGE == C -typedef struct PPG_registers { +typedef volatile struct PPG_registers { uint8_t pcr; uint8_t pmr; uint8_t nderh; Index: dac.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/dac.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- dac.h 27 May 2005 12:12:06 -0000 1.1 +++ dac.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -51,7 +51,7 @@ #define DAC_BASE 0xffffffa4 #if LANGUAGE == C -typedef struct DAC_registers { +typedef volatile struct DAC_registers { uint8_t dadr0; uint8_t dadr1; uint8_t dacr; Index: wdt.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/wdt.h,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- wdt.h 2 Jun 2005 07:42:01 -0000 1.3 +++ wdt.h 3 Jun 2005 10:07:17 -0000 1.4 @@ -51,7 +51,7 @@ #define WDT_BASE 0xffffffbc #if LANGUAGE == C -typedef struct WDT_registers { +typedef volatile struct WDT_registers { union { union { uint16_t tcsr; Index: dmac.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/dmac.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- dmac.h 1 Jun 2005 10:03:03 -0000 1.2 +++ dmac.h 3 Jun 2005 10:07:16 -0000 1.3 @@ -51,7 +51,7 @@ #define DMAC_BASE 0xfffffee0 #if LANGUAGE == C -typedef struct DMAC_registers { +typedef volatile struct DMAC_registers { uint32_t mar0a; uint16_t ioar0a; uint16_t etcr0a; Index: bus.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/bus.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- bus.h 31 May 2005 06:11:00 -0000 1.1 +++ bus.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -51,7 +51,7 @@ #define BUS_BASE 0xfffffed0 #if LANGUAGE == C -typedef struct BUS_registers { +typedef volatile struct BUS_registers { uint8_t abwcr; uint8_t astcr; uint8_t wcrh; Index: adc.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/adc.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- adc.h 27 May 2005 09:04:54 -0000 1.1 +++ adc.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -51,7 +51,7 @@ #define ADC_BASE 0xffffff90 #if LANGUAGE == C -typedef struct ADC_registers { +typedef volatile struct ADC_registers { uint8_t addrah; uint8_t addral; uint8_t addrbh; Index: tpu.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/tpu.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- tpu.h 2 Jun 2005 14:30:07 -0000 1.2 +++ tpu.h 3 Jun 2005 10:07:17 -0000 1.3 @@ -57,7 +57,7 @@ #define TPU_COMMON_BASE 0xffffffc0 #if LANGUAGE == C -typedef struct TPU_registers { +typedef volatile struct TPU_registers { uint8_t tcr; uint8_t tmdr; uint8_t tiorh; /* tior in TPU1, TPU2, TPU4, TPU5 */ @@ -71,7 +71,7 @@ uint16_t tgrd; /* only for TPU0 and TPU3 */ } TPU_registers_t; -typedef struct TPU_common_registers { +typedef volatile struct TPU_common_registers { uint8_t tstr; uint8_t tsyr; } TPU_common_registers_t; Index: sci.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/sci.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- sci.h 27 May 2005 09:04:54 -0000 1.1 +++ sci.h 3 Jun 2005 10:07:17 -0000 1.2 @@ -53,7 +53,7 @@ #define SCI2_BASE 0xffffff88 #if LANGUAGE == C -typedef struct SCI_registers { +typedef volatile struct SCI_registers { uint8_t smr; uint8_t brr; uint8_t scr; Index: ports.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/ports.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- ports.h 2 Jun 2005 14:30:07 -0000 1.2 +++ ports.h 3 Jun 2005 10:07:17 -0000 1.3 @@ -52,7 +52,7 @@ #define DDR_BASE 0xfffffeb0 #if LANGUAGE == C -typedef struct PORT_registers { +typedef volatile struct PORT_registers { uint8_t port1; uint8_t port2; uint8_t port3; @@ -91,7 +91,7 @@ uint8_t paodr; } PORT_registers_t; -typedef struct DDR_registers { +typedef volatile struct DDR_registers { uint8_t p1ddr; uint8_t p2ddr; uint8_t p3ddr; Index: ic.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/ic.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- ic.h 31 May 2005 06:11:00 -0000 1.1 +++ ic.h 3 Jun 2005 10:07:16 -0000 1.2 @@ -52,7 +52,7 @@ #define IC_BASE 0xffffff2c #if LANGUAGE == C -typedef struct IPR_registers { +typedef volatile struct IPR_registers { uint8_t ipra; uint8_t iprb; uint8_t iprc; @@ -66,7 +66,7 @@ uint8_t iprk; } IPR_registers_t; -typedef struct IC_registers { +typedef volatile struct IC_registers { uint16_t iscr; uint8_t ier; uint8_t isr; |
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From: Branislav P. <bra...@us...> - 2005-06-03 10:07:25
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Update of /cvsroot/openwince/include In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv1135 Modified Files: ChangeLog Log Message: 2005-06-03 Branislav Petrovsky <bra...@sz...> * h8/h83048/adc.h: Register structures defined as volatile. * h8/h83048/dac.h: Ditto. * h8/h83048/dmac.h: Ditto. * h8/h83048/flash.h: Ditto. * h8/h83048/ic.h: Ditto. * h8/h83048/itu.h: Ditto. * h8/h83048/other.h: Ditto. * h8/h83048/ports.h: Ditto. * h8/h83048/rc.h: Ditto. * h8/h83048/sci.h: Ditto. * h8/h83048/tpc.h: Ditto. * h8/h83048/wdt.h: Ditto. * h8/h8s2357/adc.h: Ditto. * h8/h8s2357/bus.h: Ditto. * h8/h8s2357/dac.h: Ditto. * h8/h8s2357/dmac.h: Ditto. * h8/h8s2357/dtc.h: Ditto. * h8/h8s2357/flash.h: Ditto. * h8/h8s2357/ic.h: Ditto. * h8/h8s2357/mcu.h: Ditto. * h8/h8s2357/ports.h: Ditto. * h8/h8s2357/ppg.h: Ditto. * h8/h8s2357/sci.h: Ditto. * h8/h8s2357/timer.h: Ditto. * h8/h8s2357/tpu.h: Ditto. * h8/h8s2357/wdt.h: Ditto. Index: ChangeLog =================================================================== RCS file: /cvsroot/openwince/include/ChangeLog,v retrieving revision 1.70 retrieving revision 1.71 diff -u -d -r1.70 -r1.71 --- ChangeLog 3 Jun 2005 06:08:42 -0000 1.70 +++ ChangeLog 3 Jun 2005 10:07:16 -0000 1.71 @@ -1,5 +1,34 @@ 2005-06-03 Branislav Petrovsky <bra...@sz...> + * h8/h83048/adc.h: Register structures defined as volatile. + * h8/h83048/dac.h: Ditto. + * h8/h83048/dmac.h: Ditto. + * h8/h83048/flash.h: Ditto. + * h8/h83048/ic.h: Ditto. + * h8/h83048/itu.h: Ditto. + * h8/h83048/other.h: Ditto. + * h8/h83048/ports.h: Ditto. + * h8/h83048/rc.h: Ditto. + * h8/h83048/sci.h: Ditto. + * h8/h83048/tpc.h: Ditto. + * h8/h83048/wdt.h: Ditto. + * h8/h8s2357/adc.h: Ditto. + * h8/h8s2357/bus.h: Ditto. + * h8/h8s2357/dac.h: Ditto. + * h8/h8s2357/dmac.h: Ditto. + * h8/h8s2357/dtc.h: Ditto. + * h8/h8s2357/flash.h: Ditto. + * h8/h8s2357/ic.h: Ditto. + * h8/h8s2357/mcu.h: Ditto. + * h8/h8s2357/ports.h: Ditto. + * h8/h8s2357/ppg.h: Ditto. + * h8/h8s2357/sci.h: Ditto. + * h8/h8s2357/timer.h: Ditto. + * h8/h8s2357/tpu.h: Ditto. + * h8/h8s2357/wdt.h: Ditto. + +2005-06-03 Branislav Petrovsky <bra...@sz...> + * h8/h8s2357/mcu.h (MSTPCR): Register splitted into MSTPCRH and MSTPCRL. 2005-06-02 Branislav Petrovsky <bra...@sz...> |
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From: Branislav P. <bra...@us...> - 2005-06-03 06:08:51
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Update of /cvsroot/openwince/include/h8/h8s2357 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv6883/h8/h8s2357 Modified Files: mcu.h Log Message: 2005-06-03 Branislav Petrovsky <bra...@sz...> * h8/h8s2357/mcu.h (MSTPCR): Register splitted into MSTPCRH and MSTPCRL. Index: mcu.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/mcu.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- mcu.h 31 May 2005 11:46:33 -0000 1.1 +++ mcu.h 3 Jun 2005 06:08:43 -0000 1.2 @@ -56,7 +56,8 @@ uint8_t syscr; uint8_t sckcr; uint8_t mdcr; - uint16_t mstpcr; + uint8_t mstpcrh; + uint8_t mstpcrl; uint8_t __reserved[4]; uint8_t syscr2; } MCU_registers_t; @@ -67,7 +68,8 @@ #define SYSCR MCU_pointer->syscr #define SCKCR MCU_pointer->sckcr #define MDCR MCU_pointer->mdcr -#define MSTPCR MCU_pointer->mstpcr +#define MSTPCRH MCU_pointer->mstpcrh +#define MSTPCRL MCU_pointer->mstpcrl #define SYSCR2 MCU_pointer->syscr2 #endif /* LANGUAGE == C */ @@ -75,7 +77,8 @@ #define SYSCR_OFFSET 0x01 #define SCKCR_OFFSET 0x02 #define MDCR_OFFSET 0x03 -#define MSTPCR_OFFSET 0x04 +#define MSTPCRH_OFFSET 0x04 +#define MSTPCRL_OFFSET 0x05 #define SYSCR2_OFFSET 0x0a /* SBYCR bits */ @@ -103,22 +106,24 @@ #define MDCR_MDS(x) bits_val(2,0,x) #define get_MDCR_MDS(x) bits_get(2,0,x) -/* MSTPCR bits */ -#define MSTPCR_MSTP15 bit(15) -#define MSTPCR_MSTP14 bit(14) -#define MSTPCR_MSTP13 bit(13) -#define MSTPCR_MSTP12 bit(12) -#define MSTPCR_MSTP11 bit(11) -#define MSTPCR_MSTP10 bit(10) -#define MSTPCR_MSTP9 bit(9) -#define MSTPCR_MSTP8 bit(8) -#define MSTPCR_MSTP7 bit(7) -#define MSTPCR_MSTP6 bit(6) -#define MSTPCR_MSTP5 bit(5) -#define MSTPCR_MSTP4 bit(4) -#define MSTPCR_MSTP3 bit(3) -#define MSTPCR_MSTP2 bit(2) -#define MSTPCR_MSTP1 bit(1) -#define MSTPCR_MSTP0 bit(0) +/* MSTPCRH bits */ +#define MSTPCRH_MSTP15 bit(7) +#define MSTPCRH_MSTP14 bit(6) +#define MSTPCRH_MSTP13 bit(5) +#define MSTPCRH_MSTP12 bit(4) +#define MSTPCRH_MSTP11 bit(3) +#define MSTPCRH_MSTP10 bit(2) +#define MSTPCRH_MSTP9 bit(1) +#define MSTPCRH_MSTP8 bit(0) + +/* MSTPCRL bits */ +#define MSTPCRL_MSTP7 bit(7) +#define MSTPCRL_MSTP6 bit(6) +#define MSTPCRL_MSTP5 bit(5) +#define MSTPCRL_MSTP4 bit(4) +#define MSTPCRL_MSTP3 bit(3) +#define MSTPCRL_MSTP2 bit(2) +#define MSTPCRL_MSTP1 bit(1) +#define MSTPCRL_MSTP0 bit(0) #endif /* H8S2357_MCU_H */ |
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From: Branislav P. <bra...@us...> - 2005-06-03 06:08:51
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Update of /cvsroot/openwince/include In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv6883 Modified Files: ChangeLog Log Message: 2005-06-03 Branislav Petrovsky <bra...@sz...> * h8/h8s2357/mcu.h (MSTPCR): Register splitted into MSTPCRH and MSTPCRL. Index: ChangeLog =================================================================== RCS file: /cvsroot/openwince/include/ChangeLog,v retrieving revision 1.69 retrieving revision 1.70 diff -u -d -r1.69 -r1.70 --- ChangeLog 2 Jun 2005 14:30:06 -0000 1.69 +++ ChangeLog 3 Jun 2005 06:08:42 -0000 1.70 @@ -1,3 +1,7 @@ +2005-06-03 Branislav Petrovsky <bra...@sz...> + + * h8/h8s2357/mcu.h (MSTPCR): Register splitted into MSTPCRH and MSTPCRL. + 2005-06-02 Branislav Petrovsky <bra...@sz...> * h8/h8s2357/tpu.h: Added bit names for TIER registers. |
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From: Branislav P. <bra...@us...> - 2005-06-02 14:30:17
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Update of /cvsroot/openwince/include/h8/h8s2357 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv29747/h8/h8s2357 Modified Files: ports.h tpu.h Log Message: 2005-06-02 Branislav Petrovsky <bra...@sz...> * h8/h8s2357/tpu.h: Added bit names for TIER registers. * h8/h8s2357/ports.h: Fixed newline at end of file. Index: tpu.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/tpu.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- tpu.h 27 May 2005 09:04:54 -0000 1.1 +++ tpu.h 2 Jun 2005 14:30:07 -0000 1.2 @@ -206,6 +206,15 @@ #define TIORL_IOC(x) bits_val(3,0,x) #define get_TIORL_IOC(x) bits_get(3,0,x) +/* TIER bits */ +#define TIER_TTGE bit(7) +#define TIER_TCIEU bit(5) /* only for TPU1, TPU2, TPU4, TPU5 */ +#define TIER_TCIEV bit(4) +#define TIER_TGIED bit(3) /* only for TPU0 and TPU3 */ +#define TIER_TGIEC bit(2) /* only for TPU0 and TPU3 */ +#define TIER_TGIEB bit(1) +#define TIER_TGIEA bit(0) + /* TSR bits */ #define TSR_TCFD bit(7) /* only for TPU1, TPU2, TPU4, TPU5 */ #define TSR_TCFU bit(5) /* only for TPU1, TPU2, TPU4, TPU5 */ Index: ports.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/ports.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- ports.h 27 May 2005 13:54:11 -0000 1.1 +++ ports.h 2 Jun 2005 14:30:07 -0000 1.2 @@ -617,4 +617,3 @@ #define PGDDR_PG0DDR bit(0) #endif /* H8S2357_PORTS_H */ - \ No newline at end of file |
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From: Branislav P. <bra...@us...> - 2005-06-02 14:30:17
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Update of /cvsroot/openwince/include In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv29747 Modified Files: ChangeLog Log Message: 2005-06-02 Branislav Petrovsky <bra...@sz...> * h8/h8s2357/tpu.h: Added bit names for TIER registers. * h8/h8s2357/ports.h: Fixed newline at end of file. Index: ChangeLog =================================================================== RCS file: /cvsroot/openwince/include/ChangeLog,v retrieving revision 1.68 retrieving revision 1.69 diff -u -d -r1.68 -r1.69 --- ChangeLog 2 Jun 2005 08:45:32 -0000 1.68 +++ ChangeLog 2 Jun 2005 14:30:06 -0000 1.69 @@ -1,5 +1,10 @@ 2005-06-02 Branislav Petrovsky <bra...@sz...> + * h8/h8s2357/tpu.h: Added bit names for TIER registers. + * h8/h8s2357/ports.h: Fixed newline at end of file. + +2005-06-02 Branislav Petrovsky <bra...@sz...> + * h8/h8s2357/timer.h: Added prefix TIMER to registers constants - fixed collisions with constants in tpu.h and wdt.h. |
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From: Branislav P. <bra...@us...> - 2005-06-02 08:45:57
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Update of /cvsroot/openwince/include/h8/h8s2357 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv15466/h8/h8s2357 Modified Files: timer.h Log Message: 2005-06-02 Branislav Petrovsky <bra...@sz...> * h8/h8s2357/timer.h: Added prefix TIMER to registers constants - fixed collisions with constants in tpu.h and wdt.h. Index: timer.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/timer.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- timer.h 27 May 2005 12:12:06 -0000 1.1 +++ timer.h 2 Jun 2005 08:45:32 -0000 1.2 @@ -66,50 +66,50 @@ #define TIMER_pointer ((TIMER_registers_t*) TIMER_BASE) -#define TCR0 TIMER_pointer->tcr0 -#define TCR1 TIMER_pointer->tcr1 -#define TCSR0 TIMER_pointer->tcsr0 -#define TCSR1 TIMER_pointer->tcsr1 -#define TCORA0 TIMER_pointer->tcora0 -#define TCORA1 TIMER_pointer->tcora1 -#define TCORB0 TIMER_pointer->tcorb0 -#define TCORB1 TIMER_pointer->tcorb1 -#define TCNT0 TIMER_pointer->tcnt0 -#define TCNT1 TIMER_pointer->tcnt1 +#define TIMER_TCR0 TIMER_pointer->tcr0 +#define TIMER_TCR1 TIMER_pointer->tcr1 +#define TIMER_TCSR0 TIMER_pointer->tcsr0 +#define TIMER_TCSR1 TIMER_pointer->tcsr1 +#define TIMER_TCORA0 TIMER_pointer->tcora0 +#define TIMER_TCORA1 TIMER_pointer->tcora1 +#define TIMER_TCORB0 TIMER_pointer->tcorb0 +#define TIMER_TCORB1 TIMER_pointer->tcorb1 +#define TIMER_TCNT0 TIMER_pointer->tcnt0 +#define TIMER_TCNT1 TIMER_pointer->tcnt1 #endif /* LANGUAGE == C */ -#define TCR0_OFFSET 0x00 -#define TCR1_OFFSET 0x01 -#define TCSR0_OFFSET 0x02 -#define TCSR1_OFFSET 0x03 -#define TCORA0_OFFSET 0x04 -#define TCORA1_OFFSET 0x05 -#define TCORB0_OFFSET 0x06 -#define TCORB1_OFFSET 0x07 -#define TCNT0_OFFSET 0x08 -#define TCNT1_OFFSET 0x09 +#define TIMER_TCR0_OFFSET 0x00 +#define TIMER_TCR1_OFFSET 0x01 +#define TIMER_TCSR0_OFFSET 0x02 +#define TIMER_TCSR1_OFFSET 0x03 +#define TIMER_TCORA0_OFFSET 0x04 +#define TIMER_TCORA1_OFFSET 0x05 +#define TIMER_TCORB0_OFFSET 0x06 +#define TIMER_TCORB1_OFFSET 0x07 +#define TIMER_TCNT0_OFFSET 0x08 +#define TIMER_TCNT1_OFFSET 0x09 /* TCR bits */ -#define TCR_CMIEB bit(7) -#define TCR_CMIEA bit(6) -#define TCR_OVIE bit(5) -#define TCR_CCLR_MASK bits(4,3) -#define TCR_CCLR(x) bits_val(4,3,x) -#define get_TCR_CCLR(x) bits_get(4,3,x) -#define TCR_CKS_MASK bits(2,0) -#define TCR_CKS(x) bits_val(2,0,x) -#define get_TCR_CKS(x) bits_get(2,0,x) +#define TIMER_TCR_CMIEB bit(7) +#define TIMER_TCR_CMIEA bit(6) +#define TIMER_TCR_OVIE bit(5) +#define TIMER_TCR_CCLR_MASK bits(4,3) +#define TIMER_TCR_CCLR(x) bits_val(4,3,x) +#define get_TIMER_TCR_CCLR(x) bits_get(4,3,x) +#define TIMER_TCR_CKS_MASK bits(2,0) +#define TIMER_TCR_CKS(x) bits_val(2,0,x) +#define get_TIMER_TCR_CKS(x) bits_get(2,0,x) /* TCSR bits */ -#define TCSR_CMFB bit(7) -#define TCSR_CMFA bit(6) -#define TCSR_OVF bit(5) -#define TCSR_ADTE bit(4) /* only for TCSR0 */ -#define TCSR_OSB_MASK bits(3,2) -#define TCSR_OSB(x) bits_val(3,2,x) -#define get_TCSR_OSB(x) bits_get(3,2,x) -#define TCSR_OSA_MASK bits(1,0) -#define TCSR_OSA(x) bits_val(1,0,x) -#define get_TCSR_OSA(x) bits_get(1,0,x) +#define TIMER_TCSR_CMFB bit(7) +#define TIMER_TCSR_CMFA bit(6) +#define TIMER_TCSR_OVF bit(5) +#define TIMER_TCSR_ADTE bit(4) /* only for TCSR0 */ +#define TIMER_TCSR_OSB_MASK bits(3,2) +#define TIMER_TCSR_OSB(x) bits_val(3,2,x) +#define get_TIMER_TCSR_OSB(x) bits_get(3,2,x) +#define TIMER_TCSR_OSA_MASK bits(1,0) +#define TIMER_TCSR_OSA(x) bits_val(1,0,x) +#define get_TIMER_TCSR_OSA(x) bits_get(1,0,x) #endif /* H8S2357_TIMER_H */ |
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From: Branislav P. <bra...@us...> - 2005-06-02 08:45:57
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Update of /cvsroot/openwince/include In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv15466 Modified Files: ChangeLog Log Message: 2005-06-02 Branislav Petrovsky <bra...@sz...> * h8/h8s2357/timer.h: Added prefix TIMER to registers constants - fixed collisions with constants in tpu.h and wdt.h. Index: ChangeLog =================================================================== RCS file: /cvsroot/openwince/include/ChangeLog,v retrieving revision 1.67 retrieving revision 1.68 diff -u -d -r1.67 -r1.68 --- ChangeLog 2 Jun 2005 07:47:50 -0000 1.67 +++ ChangeLog 2 Jun 2005 08:45:32 -0000 1.68 @@ -1,5 +1,10 @@ 2005-06-02 Branislav Petrovsky <bra...@sz...> + * h8/h8s2357/timer.h: Added prefix TIMER to registers constants - fixed + collisions with constants in tpu.h and wdt.h. + +2005-06-02 Branislav Petrovsky <bra...@sz...> + * h8/h83048/rc.h: New file. * h8/h83048/tpc.h: Ditto. * h8/h83048/wdt.h: Ditto. |
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From: Branislav P. <bra...@us...> - 2005-06-02 07:48:01
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Update of /cvsroot/openwince/include In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv23214 Modified Files: ChangeLog Makefile.am Log Message: 2005-06-02 Branislav Petrovsky <bra...@sz...> * h8/h83048/rc.h: New file. * h8/h83048/tpc.h: Ditto. * h8/h83048/wdt.h: Ditto. * Makefile.am (nobase_openwinceinc_HEADERS): Added new files. Index: Makefile.am =================================================================== RCS file: /cvsroot/openwince/include/Makefile.am,v retrieving revision 1.30 retrieving revision 1.31 diff -u -d -r1.30 -r1.31 --- Makefile.am 1 Jun 2005 14:15:39 -0000 1.30 +++ Makefile.am 2 Jun 2005 07:47:50 -0000 1.31 @@ -94,7 +94,10 @@ h8/h83048/itu.h \ h8/h83048/other.h \ h8/h83048/ports.h \ + h8/h83048/rc.h \ h8/h83048/sci.h \ + h8/h83048/tpc.h \ + h8/h83048/wdt.h \ h8/h8s2357/adc.h \ h8/h8s2357/bus.h \ h8/h8s2357/dac.h \ Index: ChangeLog =================================================================== RCS file: /cvsroot/openwince/include/ChangeLog,v retrieving revision 1.66 retrieving revision 1.67 diff -u -d -r1.66 -r1.67 --- ChangeLog 2 Jun 2005 07:42:00 -0000 1.66 +++ ChangeLog 2 Jun 2005 07:47:50 -0000 1.67 @@ -1,5 +1,12 @@ 2005-06-02 Branislav Petrovsky <bra...@sz...> + * h8/h83048/rc.h: New file. + * h8/h83048/tpc.h: Ditto. + * h8/h83048/wdt.h: Ditto. + * Makefile.am (nobase_openwinceinc_HEADERS): Added new files. + +2005-06-02 Branislav Petrovsky <bra...@sz...> + * h8/h8s2357/wdt.h (TCSR_OWF): Constant renamed to ... (TCSR_OVF): ... this one. |
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From: Branislav P. <bra...@us...> - 2005-06-02 07:48:00
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Update of /cvsroot/openwince/include/h8/h83048 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv23214/h8/h83048 Added Files: rc.h tpc.h wdt.h Log Message: 2005-06-02 Branislav Petrovsky <bra...@sz...> * h8/h83048/rc.h: New file. * h8/h83048/tpc.h: Ditto. * h8/h83048/wdt.h: Ditto. * Makefile.am (nobase_openwinceinc_HEADERS): Added new files. --- NEW FILE: tpc.h --- /* * $Id: tpc.h,v 1.1 2005/06/02 07:47:50 brano111 Exp $ * * H8/3048 TPC Registers * Copyright (C) 2005 Elcom s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the copyright holders nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Branislav Petrovsky <bra...@sz...>, 2005. * * Documentation: * [1] Renesas Technology Corp., "Hitachi Single-Chip Microcomputer * H8/3048 Series, H8/3048F-ZTAT Hardware Manual", * Rev. 6.0, 9/3/2002, Order Number: ADE-602-073E * */ #ifndef H83048_TPC_H #define H83048_TPC_H #include <common.h> #if LANGUAGE == C #include <stdint.h> #endif /* TPC registers */ #define TPC_BASE 0xffffa0 #if LANGUAGE == C typedef struct TPC_registers { uint8_t tpmr; uint8_t tpcr; uint8_t nderb; uint8_t ndera; uint8_t ndrb; uint8_t ndra; uint8_t ndrb_d; uint8_t ndra_d; } TPC_registers_t; #define TPC_pointer ((TPC_registers_t*) TPC_BASE) #define TPMR TPC_pointer->tpmr #define TPCR TPC_pointer->tpcr #define NDERB TPC_pointer->nderb #define NDERA TPC_pointer->ndera #define NDRB TPC_pointer->ndrb #define NDRA TPC_pointer->ndra #define NDRB_D TPC_pointer->ndrb_d #define NDRA_D TPC_pointer->ndra_d #endif /* LANGUAGE == C */ #define TPMR_OFFSET 0x00 #define TPCR_OFFSET 0x01 #define NDERB_OFFSET 0x02 #define NDERA_OFFSET 0x03 #define NDRB_OFFSET 0x04 #define NDRA_OFFSET 0x05 #define NDRB_D_OFFSET 0x06 #define NDRA_D_OFFSET 0x07 /* TPMR bits */ #define TPMR_G3NOV bit(3) #define TPMR_G2NOV bit(2) #define TPMR_G1NOV bit(1) #define TPMR_G0NOV bit(0) /* TPCR bits */ #define TPCR_G3CMS_MASK bits(7,6) #define TPCR_G3CMS(x) bits_val(7,6,x) #define get_TPCR_G3CMS(x) bits_get(7,6,x) #define TPCR_G2CMS_MASK bits(5,4) #define TPCR_G2CMS(x) bits_val(5,4,x) #define get_TPCR_G2CMS(x) bits_get(5,4,x) #define TPCR_G1CMS_MASK bits(3,2) #define TPCR_G1CMS(x) bits_val(3,2,x) #define get_TPCR_G1CMS(x) bits_get(3,2,x) #define TPCR_G0CMS_MASK bits(1,0) #define TPCR_G0CMS(x) bits_val(1,0,x) #define get_TPCR_G0CMS(x) bits_get(1,0,x) /* NDERB bits */ #define NDERB_NDER15 bit(7) #define NDERB_NDER14 bit(6) #define NDERB_NDER13 bit(5) #define NDERB_NDER12 bit(4) #define NDERB_NDER11 bit(3) #define NDERB_NDER10 bit(2) #define NDERB_NDER9 bit(1) #define NDERB_NDER8 bit(0) /* NDERA bits */ #define NDERA_NDER7 bit(7) #define NDERA_NDER6 bit(6) #define NDERA_NDER5 bit(5) #define NDERA_NDER4 bit(4) #define NDERA_NDER3 bit(3) #define NDERA_NDER2 bit(2) #define NDERA_NDER1 bit(1) #define NDERA_NDER0 bit(0) /* NDRB bits */ #define NDRB_NDR15 bit(7) #define NDRB_NDR14 bit(6) #define NDRB_NDR13 bit(5) #define NDRB_NDR12 bit(4) #define NDRB_NDR11 bit(3) #define NDRB_NDR10 bit(2) #define NDRB_NDR9 bit(1) #define NDRB_NDR8 bit(0) /* NDRA bits */ #define NDRA_NDR7 bit(7) #define NDRA_NDR6 bit(6) #define NDRA_NDR5 bit(5) #define NDRA_NDR4 bit(4) #define NDRA_NDR3 bit(3) #define NDRA_NDR2 bit(2) #define NDRA_NDR1 bit(1) #define NDRA_NDR0 bit(0) #endif /* H83048_TPC_H */ --- NEW FILE: wdt.h --- /* * $Id: wdt.h,v 1.1 2005/06/02 07:47:50 brano111 Exp $ * * H8/3048 WDT Registers * Copyright (C) 2005 Elcom s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the copyright holders nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Branislav Petrovsky <bra...@sz...>, 2005. * * Documentation: * [1] Renesas Technology Corp., "Hitachi Single-Chip Microcomputer * H8/3048 Series, H8/3048F-ZTAT Hardware Manual", * Rev. 6.0, 9/3/2002, Order Number: ADE-602-073E * */ #ifndef H83048_WDT_H #define H83048_WDT_H #include <common.h> #if LANGUAGE == C #include <stdint.h> #endif /* WDT registers */ #define WDT_BASE 0xffffa8 #if LANGUAGE == C typedef struct WDT_registers { union { union { uint16_t tcsr; uint16_t tcnt; } _write; struct { uint8_t tcsr; uint8_t tcnt; } _read; } _timer; union { union { uint16_t rstcsr; } _write; struct { uint8_t __reserved; uint8_t rstcsr; } _read; } _rstcsr; } WDT_registers_t; #define WDT_pointer ((WDT_registers_t*) WDT_BASE) #define TCSR_r WDT_pointer->_timer._read.tcsr #define TCNT_r WDT_pointer->_timer._read.tcnt #define RSTCSR_r WDT_pointer->_rstcsr._read.rstcsr #define TCSR_w WDT_pointer->_timer._write.tcsr #define TCNT_w WDT_pointer->_timer._write.tcnt #define RSTCSR_w WDT_pointer->_rstcsr._write.rstcsr #endif /* LANGUAGE == C */ #define TCSR_OFFSET 0x00 #define TCNT_OFFSET_w 0x00 #define TCNT_OFFSET_r 0x01 #define RSTCSR_OFFSET_w 0x02 #define RSTCSR_OFFSET_r 0x03 /* TCSR bits */ #define TCSR_OVF bit(7) #define TCSR_WTIT bit(6) #define TCSR_TME bit(5) #define TCSR_CKS_MASK bits(2,0) #define TCSR_CKS(x) bits_val(2,0,x) #define get_TCSR_CKS(x) bits_get(2,0,x) /* RSTCSR bits */ #define RSTCSR_WRST bit(7) #define RSTCSR_RSTOE bit(6) #endif /* H83048_WDT_H */ --- NEW FILE: rc.h --- /* * $Id: rc.h,v 1.1 2005/06/02 07:47:50 brano111 Exp $ * * H8/3048 Refresh Controller (RC) Registers * Copyright (C) 2005 Elcom s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the copyright holders nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Branislav Petrovsky <bra...@sz...>, 2005. * * Documentation: * [1] Renesas Technology Corp., "Hitachi Single-Chip Microcomputer * H8/3048 Series, H8/3048F-ZTAT Hardware Manual", * Rev. 6.0, 9/3/2002, Order Number: ADE-602-073E * */ #ifndef H83048_RC_H #define H83048_RC_H #include <common.h> #if LANGUAGE == C #include <stdint.h> #endif /* RC registers */ #define RC_BASE 0xffffac #if LANGUAGE == C typedef struct RC_registers { uint8_t rfshcr; uint8_t rtmcsr; uint8_t rtcnt; uint8_t rtcor; } RC_registers_t; #define RC_pointer ((RC_registers_t*) RC_BASE) #define RFSHCR RC_pointer->rfshcr #define RTMCSR RC_pointer->rtmcsr #define RTCNT RC_pointer->rtcnt #define RTCOR RC_pointer->rtcor #endif /* LANGUAGE == C */ #define RFSHCR_OFFSET 0x00 #define RTMCSR_OFFSET 0x01 #define RTCNT_OFFSET 0x02 #define RTCOR_OFFSET 0x03 /* RFSHCR bits */ #define RFSHCR_SRFMD bit(7) #define RFSHCR_PSRAME bit(6) #define RFSHCR_DRAME bit(5) #define RFSHCR_CASWE bit(4) #define RFSHCR_M9M8 bit(3) #define RFSHCR_RFSHE bit(2) #define RFSHCR_RCYCE bit(0) /* RTMCSR bits */ #define RTMCSR_CMF bit(7) #define RTMCSR_CMIE bit(6) #define RTMCSR_CKS_MASK bits(5,3) #define RTMCSR_CKS(x) bits_val(5,3,x) #define get_RTMCSR_CKS(x) bits_get(5,3,x) #endif /* H83048_RC_H */ |
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From: Branislav P. <bra...@us...> - 2005-06-02 07:42:09
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Update of /cvsroot/openwince/include In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv19657 Modified Files: ChangeLog Log Message: 2005-06-02 Branislav Petrovsky <bra...@sz...> * h8/h8s2357/wdt.h (TCSR_OWF): Constant renamed to ... (TCSR_OVF): ... this one. Index: ChangeLog =================================================================== RCS file: /cvsroot/openwince/include/ChangeLog,v retrieving revision 1.65 retrieving revision 1.66 diff -u -d -r1.65 -r1.66 --- ChangeLog 2 Jun 2005 06:34:20 -0000 1.65 +++ ChangeLog 2 Jun 2005 07:42:00 -0000 1.66 @@ -1,5 +1,10 @@ 2005-06-02 Branislav Petrovsky <bra...@sz...> + * h8/h8s2357/wdt.h (TCSR_OWF): Constant renamed to ... + (TCSR_OVF): ... this one. + +2005-06-02 Branislav Petrovsky <bra...@sz...> + * h8/h83048/itu.h: Added registers bit names. 2005-06-01 Branislav Petrovsky <bra...@sz...> |
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From: Branislav P. <bra...@us...> - 2005-06-02 07:42:09
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Update of /cvsroot/openwince/include/h8/h8s2357 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv19657/h8/h8s2357 Modified Files: wdt.h Log Message: 2005-06-02 Branislav Petrovsky <bra...@sz...> * h8/h8s2357/wdt.h (TCSR_OWF): Constant renamed to ... (TCSR_OVF): ... this one. Index: wdt.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h8s2357/wdt.h,v retrieving revision 1.2 retrieving revision 1.3 diff -u -d -r1.2 -r1.3 --- wdt.h 1 Jun 2005 10:06:02 -0000 1.2 +++ wdt.h 2 Jun 2005 07:42:01 -0000 1.3 @@ -90,7 +90,7 @@ #define RSTCSR_OFFSET_r 0x03 /* TCSR bits */ -#define TCSR_OWF bit(7) +#define TCSR_OVF bit(7) #define TCSR_WTIT bit(6) #define TCSR_TME bit(5) #define TCSR_CKS_MASK bits(2,0) |
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From: Branislav P. <bra...@us...> - 2005-06-02 06:34:28
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Update of /cvsroot/openwince/include/h8/h83048 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv19771/h8/h83048 Modified Files: itu.h Log Message: 2005-06-02 Branislav Petrovsky <bra...@sz...> * h8/h83048/itu.h: Added registers bit names. Index: itu.h =================================================================== RCS file: /cvsroot/openwince/include/h8/h83048/itu.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- itu.h 1 Jun 2005 14:15:40 -0000 1.1 +++ itu.h 2 Jun 2005 06:34:20 -0000 1.2 @@ -189,5 +189,78 @@ #define TOER_OFFSET 0x00 #define TOCR_OFFSET 0x01 +/* TCR bits */ +#define TCR_CCLR_MASK bits(6,5) +#define TCR_CCLR(x) bits_val(6,5,x) +#define get_TCR_CCLR(x) bits_get(6,5,x) +#define TCR_CKEG_MASK bits(4,3) +#define TCR_CKEG(x) bits_val(4,3,x) +#define get_TCR_CKEG(x) bits_get(4,3,x) +#define TCR_TPSC_MASK bits(2,0) +#define TCR_TPSC(x) bits_val(2,0,x) +#define get_TCR_TPSC(x) bits_get(2,0,x) + +/* TIOR bits */ +#define TIOR_IOB_MASK bits(6,4) +#define TIOR_IOB(x) bits_val(6,4,x) +#define get_TIOR_IOB(x) bits_get(6,4,x) +#define TIOR_IOA_MASK bits(2,0) +#define TIOR_IOA(x) bits_val(2,0,x) +#define get_TIOR_IOA(x) bits_get(2,0,x) + +/* TIER bits */ +#define TIER_OVIE bit(2) +#define TIER_IMIEB bit(1) +#define TIER_IMIEA bit(0) + +/* TSR bits */ +#define TSR_OVF bit(2) +#define TSR_IMFB bit(1) +#define TSR_IMFA bit(0) + +/* TSTR bits */ +#define TSTR_STR4 bit(4) +#define TSTR_STR3 bit(3) +#define TSTR_STR2 bit(2) +#define TSTR_STR1 bit(1) +#define TSTR_STR0 bit(0) + +/* TSNC bits */ +#define TSNC_SYNC4 bit(4) +#define TSNC_SYNC3 bit(3) +#define TSNC_SYNC2 bit(2) +#define TSNC_SYNC1 bit(1) +#define TSNC_SYNC0 bit(0) + +/* TMDR bits */ +#define TMDR_MDF bit(6) +#define TMDR_FDIR bit(5) +#define TMDR_PWM4 bit(4) +#define TMDR_PWM3 bit(3) +#define TMDR_PWM2 bit(2) +#define TMDR_PWM1 bit(1) +#define TMDR_PWM0 bit(0) + +/* TFCR bits */ +#define TFCR_CMD_MASK bits(5,4) +#define TFCR_CMD(x) bits_val(5,4,x) +#define get_TFCR_CMD(x) bits_get(5,4,x) +#define TFCR_BFB4 bit(3) +#define TFCR_BFA4 bit(2) +#define TFCR_BFB3 bit(1) +#define TFCR_BFA3 bit(0) + +/* TOER bits */ +#define TOER_EXB4 bit(5) +#define TOER_EXA4 bit(4) +#define TOER_EB3 bit(3) +#define TOER_EB4 bit(2) +#define TOER_EA4 bit(1) +#define TOER_EA3 bit(0) + +/* TOCR bits */ +#define TOCR_XTGD bit(4) +#define TOCR_OLS4 bit(1) +#define TOCR_OLS3 bit(0) #endif /* H83048_ITU_H */ |
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From: Branislav P. <bra...@us...> - 2005-06-02 06:34:28
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Update of /cvsroot/openwince/include In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv19771 Modified Files: ChangeLog Log Message: 2005-06-02 Branislav Petrovsky <bra...@sz...> * h8/h83048/itu.h: Added registers bit names. Index: ChangeLog =================================================================== RCS file: /cvsroot/openwince/include/ChangeLog,v retrieving revision 1.64 retrieving revision 1.65 diff -u -d -r1.64 -r1.65 --- ChangeLog 1 Jun 2005 14:15:39 -0000 1.64 +++ ChangeLog 2 Jun 2005 06:34:20 -0000 1.65 @@ -1,3 +1,7 @@ +2005-06-02 Branislav Petrovsky <bra...@sz...> + + * h8/h83048/itu.h: Added registers bit names. + 2005-06-01 Branislav Petrovsky <bra...@sz...> * h8/h83048/adc.h: New file. |
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From: Branislav P. <bra...@us...> - 2005-06-01 14:15:52
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Update of /cvsroot/openwince/include/h8/h83048 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv25222/h8/h83048 Added Files: adc.h dac.h dmac.h flash.h ic.h itu.h other.h ports.h sci.h Log Message: 2005-06-01 Branislav Petrovsky <bra...@sz...> * h8/h83048/adc.h: New file. * h8/h83048/dac.h: Ditto. * h8/h83048/dmac.h: Ditto. * h8/h83048/flash.h: Ditto. * h8/h83048/ic.h: Ditto. * h8/h83048/itu.h: Ditto. * h8/h83048/other.h: Ditto. * h8/h83048/ports.h: Ditto. * h8/h83048/sci.h: Ditto. * Makefile.am (nobase_openwinceinc_HEADERS): Added new files. --- NEW FILE: dac.h --- /* * $Id: dac.h,v 1.1 2005/06/01 14:15:40 brano111 Exp $ * * H8/3048 DAC Registers * Copyright (C) 2005 Elcom s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the copyright holders nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Branislav Petrovsky <bra...@sz...>, 2005. * * Documentation: * [1] Renesas Technology Corp., "Hitachi Single-Chip Microcomputer * H8/3048 Series, H8/3048F-ZTAT Hardware Manual", * Rev. 6.0, 9/3/2002, Order Number: ADE-602-073E * */ #ifndef H83048_DAC_H #define H83048_DAC_H #include <common.h> #if LANGUAGE == C #include <stdint.h> #endif /* DAC registers */ #define DAC_BASE 0xffffdc #if LANGUAGE == C typedef struct DAC_registers { uint8_t dadr0; uint8_t dadr1; uint8_t dacr; } DAC_registers_t; #define DAC_pointer ((DAC_registers_t*) DAC_BASE) #define DADR0 DAC_pointer->dadr0 #define DADR1 DAC_pointer->dadr1 #define DACR DAC_pointer->dacr #endif /* LANGUAGE == C */ #define DADR0_OFFSET 0x00 #define DADR1_OFFSET 0x01 #define DACR_OFFSET 0x02 /* DACR bits */ #define DACR_DAOE1 bit(7) #define DACR_DAOE0 bit(6) #define DACR_DAE bit(5) #endif /* H83048_DAC_H */ --- NEW FILE: flash.h --- /* * $Id: flash.h,v 1.1 2005/06/01 14:15:40 brano111 Exp $ * * H8/3048 Flash Registers * Copyright (C) 2005 Elcom s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the copyright holders nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Branislav Petrovsky <bra...@sz...>, 2005. * * Documentation: * [1] Renesas Technology Corp., "Hitachi Single-Chip Microcomputer * H8/3048 Series, H8/3048F-ZTAT Hardware Manual", * Rev. 6.0, 9/3/2002, Order Number: ADE-602-073E * */ #ifndef H83048_FLASH_H #define H83048_FLASH_H #include <common.h> #if LANGUAGE == C #include <stdint.h> #endif /* FLASH registers */ #define FLASH_BASE 0xffff40 #if LANGUAGE == C typedef struct FLASH_registers { uint8_t flmcr; uint8_t __reserved1; uint8_t ebr1; uint8_t ebr2; uint8_t __reserved2[4]; uint8_t ramcr; } FLASH_registers_t; #define FLASH_pointer ((FLASH_registers_t*) FLASH_BASE) #define FLMCR FLASH_pointer->flmcr #define EBR1 FLASH_pointer->ebr1 #define EBR2 FLASH_pointer->ebr2 #define RAMCR FLASH_pointer->ramcr #endif /* LANGUAGE == C */ #define FLMCR_OFFSET 0x00 #define EBR1_OFFSET 0x02 #define EBR2_OFFSET 0x03 #define RAMCR_OFFSET 0x08 /* FLMCR bits */ #define FLMCR_VPP bit(7) #define FLMCR_VPPE bit(6) #define FLMCR_EV bit(3) #define FLMCR_PV bit(2) #define FLMCR_E bit(1) #define FLMCR_P bit(0) /* EBR1 bits */ #define EBR1_LB7 bit(7) #define EBR1_LB6 bit(6) #define EBR1_LB5 bit(5) #define EBR1_LB4 bit(4) #define EBR1_LB3 bit(3) #define EBR1_LB2 bit(2) #define EBR1_LB1 bit(1) #define EBR1_LB0 bit(0) /* EBR2 bits */ #define EBR2_SB7 bit(7) #define EBR2_SB6 bit(6) #define EBR2_SB5 bit(5) #define EBR2_SB4 bit(4) #define EBR2_SB3 bit(3) #define EBR2_SB2 bit(2) #define EBR2_SB1 bit(1) #define EBR2_SB0 bit(0) /* RAMCR bits */ #define RAMCR_FLER bit(7) #define RAMCR_RAMS bit(3) #define RAMCR_RAM_MASK bits(2,0) #define RAMCR_RAM(x) bits_val(2,0,x) #define get_RAMCR_RAM(x) bits_get(2,0,x) #endif /* H83048_FLASH_H */ --- NEW FILE: dmac.h --- /* * $Id: dmac.h,v 1.1 2005/06/01 14:15:40 brano111 Exp $ * * H8/3048 DMAC Registers * Copyright (C) 2005 Elcom s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the copyright holders nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Branislav Petrovsky <bra...@sz...>, 2005. * * Documentation: * [1] Renesas Technology Corp., "Hitachi Single-Chip Microcomputer * H8/3048 Series, H8/3048F-ZTAT Hardware Manual", * Rev. 6.0, 9/3/2002, Order Number: ADE-602-073E * */ #ifndef H83048_DMAC_H #define H83048_DMAC_H #include <common.h> #if LANGUAGE == C #include <stdint.h> #endif /* DMAC registers */ #define DMAC_BASE 0xffff20 #if LANGUAGE == C typedef struct DMAC_registers { uint32_t mar0a; uint16_t etcr0a; uint8_t ioar0a; uint8_t dtcr0a; uint32_t mar0b; uint16_t etcr0b; uint8_t ioar0b; uint8_t dtcr0b; uint32_t mar1a; uint16_t etcr1a; uint8_t ioar1a; uint8_t dtcr1a; uint32_t mar1b; uint16_t etcr1b; uint8_t ioar1b; uint8_t dtcr1b; } DMAC_registers_t; #define DMAC_pointer ((DMAC_registers_t*) DMAC_BASE) #define MAR0A DMAC_pointer->mar0a #define ETCR0A DMAC_pointer->etcr0a #define IOAR0A DMAC_pointer->ioar0a #define DTCR0A DMAC_pointer->dtcr0a #define MAR0B DMAC_pointer->mar0b #define ETCR0B DMAC_pointer->etcr0b #define IOAR0B DMAC_pointer->ioar0b #define DTCR0B DMAC_pointer->dtcr0b #define MAR1A DMAC_pointer->mar1a #define ETCR1A DMAC_pointer->etcr1a #define IOAR1A DMAC_pointer->ioar1a #define DTCR1A DMAC_pointer->dtcr1a #define MAR1B DMAC_pointer->mar1b #define ETCR1B DMAC_pointer->etcr1b #define IOAR1B DMAC_pointer->ioar1b #define DTCR1B DMAC_pointer->dtcr1b #endif /* LANGUAGE == C */ #define MAR0A_OFFSET 0x00 #define ETCR0A_OFFSET 0x04 #define IOAR0A_OFFSET 0x06 #define DTCR0A_OFFSET 0x07 #define MAR0B_OFFSET 0x08 #define ETCR0B_OFFSET 0x0c #define IOAR0B_OFFSET 0x0e #define DTCR0B_OFFSET 0x0f #define MAR1A_OFFSET 0x10 #define ETCR1A_OFFSET 0x14 #define IOAR1A_OFFSET 0x16 #define DTCR1A_OFFSET 0x17 #define MAR1B_OFFSET 0x18 #define ETCR1B_OFFSET 0x1c #define IOAR1B_OFFSET 0x1e #define DTCR1B_OFFSET 0x1f /* DTCRA bits - short address mode */ #define DTCRA_DTE bit(7) #define DTCRA_DTSZ bit(6) #define DTCRA_DTID bit(5) #define DTCRA_RPE bit(4) #define DTCRA_DTIE bit(3) #define DTCRA_DTS_MASK bits(2,0) #define DTCRA_DTS(x) bits_val(2,0,x) #define get_DTCRA_DTS(x) bits_get(2,0,x) /* DTCRA bits - full address mode */ #define DTCRA_SAID bit(5) #define DTCRA_SAIDE bit(4) #define DTCRA_DTSA_MASK bits(2,0) #define DTCRA_DTSA(x) bits_val(2,0,x) #define get_DTCRA_DTSA(x) bits_get(2,0,x) /* DTCRB bits - short address mode */ #define DTCRB_DTE bit(7) #define DTCRB_DTSZ bit(6) #define DTCRB_DTID bit(5) #define DTCRB_RPE bit(4) #define DTCRB_DTIE bit(3) #define DTCRB_DTS_MASK bits(2,0) #define DTCRB_DTS(x) bits_val(2,0,x) #define get_DTCRB_DTS(x) bits_get(2,0,x) /* DTCRB bits - full address mode */ #define DTCRB_DAID bit(5) #define DTCRB_DAIDE bit(4) #define DTCRB_TMS bit(3) #define DTCRB_DTSB_MASK bits(2,0) #define DTCRB_DTSB(x) bits_val(2,0,x) #define get_DTCRB_DTSB(x) bits_get(2,0,x) #endif /* H83048_DMAC_H */ --- NEW FILE: adc.h --- /* * $Id: adc.h,v 1.1 2005/06/01 14:15:40 brano111 Exp $ * * H8/3048 ADC Registers * Copyright (C) 2005 Elcom s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the copyright holders nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Branislav Petrovsky <bra...@sz...>, 2005. * * Documentation: * [1] Renesas Technology Corp., "Hitachi Single-Chip Microcomputer * H8/3048 Series, H8/3048F-ZTAT Hardware Manual", * Rev. 6.0, 9/3/2002, Order Number: ADE-602-073E * */ #ifndef H83048_ADC_H #define H83048_ADC_H #include <common.h> #if LANGUAGE == C #include <stdint.h> #endif /* ADC registers */ #define ADC_BASE 0xffffe0 #if LANGUAGE == C typedef struct ADC_registers { uint8_t addrah; uint8_t addral; uint8_t addrbh; uint8_t addrbl; uint8_t addrch; uint8_t addrcl; uint8_t addrdh; uint8_t addrdl; uint8_t adcsr; uint8_t adcr; } ADC_registers_t; #define ADC_pointer ((ADC_registers_t*) ADC_BASE) #define ADDRAH ADC_pointer->addrah #define ADDRAL ADC_pointer->addral #define ADDRBH ADC_pointer->addrbh #define ADDRBL ADC_pointer->addrbl #define ADDRCH ADC_pointer->addrch #define ADDRCL ADC_pointer->addrcl #define ADDRDH ADC_pointer->addrdh #define ADDRDL ADC_pointer->addrdl #define ADCSR ADC_pointer->adcsr #define ADCR ADC_pointer->adcr #endif /* LANGUAGE == C */ #define ADDRAH_OFFSET 0x00 #define ADDRAL_OFFSET 0x01 #define ADDRBH_OFFSET 0x02 #define ADDRBL_OFFSET 0x03 #define ADDRCH_OFFSET 0x04 #define ADDRCL_OFFSET 0x05 #define ADDRDH_OFFSET 0x06 #define ADDRDL_OFFSET 0x07 #define ADCSR_OFFSET 0x08 #define ADCR_OFFSET 0x09 /* ADDR bits */ #define ADDR_AD9 bit(7) #define ADDR_AD8 bit(6) #define ADDR_AD7 bit(5) #define ADDR_AD6 bit(4) #define ADDR_AD5 bit(3) #define ADDR_AD4 bit(2) #define ADDR_AD3 bit(1) #define ADDR_AD2 bit(0) #define ADDR_AD1 bit(7) #define ADDR_AD0 bit(6) /* ADCSR bits */ #define ADCSR_ADF bit(7) #define ADCSR_ADIE bit(6) #define ADCSR_ADST bit(5) #define ADCSR_SCAN bit(4) #define ADCSR_CKS bit(3) #define ADCSR_CH_MASK bits(2,0) #define ADCSR_CH(x) bits_val(2,0,x) #define get_ADCSR_CH(x) bits_get(2,0,x) /* ADCR bits */ #define ADCR_TRGE bit(7) #endif /* H83048_ADC_H */ --- NEW FILE: other.h --- /* * $Id: other.h,v 1.1 2005/06/01 14:15:40 brano111 Exp $ * * H8/3048 Other Registers (bus, system, ...) * Copyright (C) 2005 Elcom s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the copyright holders nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Branislav Petrovsky <bra...@sz...>, 2005. * * Documentation: * [1] Renesas Technology Corp., "Hitachi Single-Chip Microcomputer * H8/3048 Series, H8/3048F-ZTAT Hardware Manual", * Rev. 6.0, 9/3/2002, Order Number: ADE-602-073E * */ #ifndef H83048_OTHER_H #define H83048_OTHER_H #include <common.h> #if LANGUAGE == C #include <stdint.h> #endif /* OTHER registers */ #define OTHER1_BASE 0xffff5c #define OTHER2_BASE 0xffffec #if LANGUAGE == C typedef struct OTHER1_registers { uint8_t dastcr; uint8_t divcr; uint8_t mstcr; uint8_t cscr; } OTHER1_registers_t; typedef struct OTHER2_registers { uint8_t abwcr; uint8_t astcr; uint8_t wcr; uint8_t wcer; uint8_t __reserved; uint8_t mdcr; uint8_t syscr; uint8_t brcr; } OTHER2_registers_t; #define OTHER1_pointer ((OTHER1_registers_t*) OTHER1_BASE) #define OTHER2_pointer ((OTHER2_registers_t*) OTHER2_BASE) #define DASTCR OTHER1_pointer->dastcr #define DIVCR OTHER1_pointer->divcr #define MSTCR OTHER1_pointer->mstcr #define CSCR OTHER1_pointer->cscr #define ABWCR OTHER2_pointer->abwcr #define ASTCR OTHER2_pointer->astcr #define WCR OTHER2_pointer->wcr #define WCER OTHER2_pointer->wcer #define MDCR OTHER2_pointer->mdcr #define SYSCR OTHER2_pointer->syscr #define BRCR OTHER2_pointer->brcr #endif /* LANGUAGE == C */ #define DASTCR_OFFSET 0x00 #define DIVCR_OFFSET 0x01 #define MSTCR_OFFSET 0x02 #define CSCR_OFFSET 0x03 #define ABWCR_OFFSET 0x00 #define ASTCR_OFFSET 0x01 #define WCR_OFFSET 0x02 #define WCER_OFFSET 0x03 #define MDCR_OFFSET 0x05 #define SYSCR_OFFSET 0x06 #define BRCR_OFFSET 0x07 /* DASTCR bits */ #define DASTCR_DASTE bit(0) /* DIVCR bits */ #define DIVCR_DIV_MASK bits(1,0) #define DIVCR_DIV(x) bits_val(1,0,x) #define get_DIVCR_DIV(x) bits_get(1,0,x) /* MSTCR bits */ #define MSTCR_PSTOP bit(7) #define MSTCR_MSTOP5 bit(5) #define MSTCR_MSTOP4 bit(4) #define MSTCR_MSTOP3 bit(3) #define MSTCR_MSTOP2 bit(2) #define MSTCR_MSTOP1 bit(1) #define MSTCR_MSTOP0 bit(0) /* CSCR bits */ #define CSCR_CS7E bit(7) #define CSCR_CS6E bit(6) #define CSCR_CS5E bit(5) #define CSCR_CS4E bit(4) /* ABWCR bits */ #define ABWCR_ABW7 bit(7) #define ABWCR_ABW6 bit(6) #define ABWCR_ABW5 bit(5) #define ABWCR_ABW4 bit(4) #define ABWCR_ABW3 bit(3) #define ABWCR_ABW2 bit(2) #define ABWCR_ABW1 bit(1) #define ABWCR_ABW0 bit(0) /* ASTCR bits */ #define ASTCR_AST7 bit(7) #define ASTCR_AST6 bit(6) #define ASTCR_AST5 bit(5) #define ASTCR_AST4 bit(4) #define ASTCR_AST3 bit(3) #define ASTCR_AST2 bit(2) #define ASTCR_AST1 bit(1) #define ASTCR_AST0 bit(0) /* WCR bits */ #define WCR_WMS_MASK bits(3,2) #define WCR_WMS(x) bits_val(3,2,x) #define get_WCR_WMS(x) bits_get(3,2,x) #define WCR_WC_MASK bits(1,0) #define WCR_WC(x) bits_val(1,0,x) #define get_WCR_WC(x) bits_get(1,0,x) /* WCER bits */ #define WCER_WCE7 bit(7) #define WCER_WCE6 bit(6) #define WCER_WCE5 bit(5) #define WCER_WCE4 bit(4) #define WCER_WCE3 bit(3) #define WCER_WCE2 bit(2) #define WCER_WCE1 bit(1) #define WCER_WCE0 bit(0) /* MDCR bits */ #define MDCR_MDS_MASK bits(2,0) #define MDCR_MDS(x) bits_val(2,0,x) #define get_MDCR_MDS(x) bits_get(2,0,x) /* SYSCR bits */ #define SYSCR_SSBY bit(7) #define SYSCR_STS_MASK bits(6,4) #define SYSCR_STS(x) bits_val(6,4,x) #define get_SYSCR_STS(x) bits_get(6,4,x) #define SYSCR_UE bit(3) #define SYSCR_NMIEG bit(2) #define SYSCR_RAME bit(0) /* BRCR bits */ #define BRCR_A23E bit(7) #define BRCR_A22E bit(6) #define BRCR_A21E bit(5) #define BRCR_BRLE bit(0) #endif /* H83048_OTHER_H */ --- NEW FILE: sci.h --- /* * $Id: sci.h,v 1.1 2005/06/01 14:15:40 brano111 Exp $ * * H8/3048 SCI Registers * Copyright (C) 2005 Elcom s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the copyright holders nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Branislav Petrovsky <bra...@sz...>, 2005. * * Documentation: * [1] Renesas Technology Corp., "Hitachi Single-Chip Microcomputer * H8/3048 Series, H8/3048F-ZTAT Hardware Manual", * Rev. 6.0, 9/3/2002, Order Number: ADE-602-073E * */ #ifndef H83048_SCI_H #define H83048_SCI_H #include <common.h> #if LANGUAGE == C #include <stdint.h> #endif /* SCI registers */ #define SCI0_BASE 0xffffb0 #define SCI1_BASE 0xffffb8 #if LANGUAGE == C typedef struct SCI_registers { uint8_t smr; uint8_t brr; uint8_t scr; uint8_t tdr; uint8_t ssr; uint8_t rdr; uint8_t scmr; } SCI_registers_t; #define SCI0_pointer ((SCI_registers_t*) SCI0_BASE) #define SCI1_pointer ((SCI_registers_t*) SCI1_BASE) #define SMR0 SCI0_pointer->smr #define BRR0 SCI0_pointer->brr #define SCR0 SCI0_pointer->scr #define TDR0 SCI0_pointer->tdr #define SSR0 SCI0_pointer->ssr #define RDR0 SCI0_pointer->rdr #define SCMR0 SCI0_pointer->scmr #define SMR1 SCI1_pointer->smr #define BRR1 SCI1_pointer->brr #define SCR1 SCI1_pointer->scr #define TDR1 SCI1_pointer->tdr #define SSR1 SCI1_pointer->ssr #define RDR1 SCI1_pointer->rdr #define SCMR1 SCI1_pointer->scmr #endif /* LANGUAGE == C */ #define SMR_OFFSET 0x00 #define BRR_OFFSET 0x01 #define SCR_OFFSET 0x02 #define TDR_OFFSET 0x03 #define SSR_OFFSET 0x04 #define RDR_OFFSET 0x05 #define SCMR_OFFSET 0x06 /* SMR bits */ #define SMR_CA bit(7) #define SMR_GM bit(7) #define SMR_CHR bit(6) #define SMR_PE bit(5) #define SMR_OE bit(4) #define SMR_STOP bit(3) #define SMR_MP bit(2) #define SMR_CKS_MASK bits(1,0) #define SMR_CKS(x) bits_val(1,0,x) #define get_SMR_CKS(x) bits_get(1,0,x) /* SCR bits */ #define SCR_TIE bit(7) #define SCR_RIE bit(6) #define SCR_TE bit(5) #define SCR_RE bit(4) #define SCR_MPIE bit(3) #define SCR_TEIE bit(2) #define SCR_CKE_MASK bits(1,0) #define SCR_CKE(x) bits_val(1,0,x) #define get_SCR_CKE(x) bits_get(1,0,x) /* SSR bits */ #define SSR_TDRE bit(7) #define SSR_RDFR bit(6) #define SSR_ORER bit(5) #define SSR_FER bit(4) #define SSR_ERS bit(4) #define SSR_PER bit(3) #define SSR_TEND bit(2) #define SSR_MPB bit(1) #define SSR_MPBT bit(0) /* SCMR bits */ #define SCMR_SDIR bit(3) #define SCMR_SINV bit(2) #define SCMR_SMIF bit(0) #endif /* H83048_SCI_H */ --- NEW FILE: ports.h --- /* * $Id: ports.h,v 1.1 2005/06/01 14:15:40 brano111 Exp $ * * H8/3048 PORTS Registers * Copyright (C) 2005 Elcom s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the copyright holders nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Branislav Petrovsky <bra...@sz...>, 2005. * * Documentation: * [1] Renesas Technology Corp., "Hitachi Single-Chip Microcomputer * H8/3048 Series, H8/3048F-ZTAT Hardware Manual", * Rev. 6.0, 9/3/2002, Order Number: ADE-602-073E * */ #ifndef H83048_PORTS_H #define H83048_PORTS_H #include <common.h> #if LANGUAGE == C #include <stdint.h> #endif /* PORTS registers */ #define PORT_BASE 0xffffc0 #if LANGUAGE == C typedef struct PORT_registers { uint8_t p1ddr; uint8_t p2ddr; uint8_t p1dr; uint8_t p2dr; uint8_t p3ddr; uint8_t p4ddr; uint8_t p3dr; uint8_t p4dr; uint8_t p5ddr; uint8_t p6ddr; uint8_t p5dr; uint8_t p6dr; uint8_t __reserved1; uint8_t p8ddr; uint8_t p7dr; uint8_t p8dr; uint8_t p9ddr; uint8_t paddr; uint8_t p9dr; uint8_t padr; uint8_t pbddr; uint8_t __reserved2; uint8_t pbdr; uint8_t __reserved3; uint8_t p2pcr; uint8_t __reserved4; uint8_t p4pcr; uint8_t p5pcr; } PORT_registers_t; #define PORT_pointer ((PORT_registers_t*) PORT_BASE) #define P1DDR PORT_pointer->p1ddr #define P2DDR PORT_pointer->p2ddr #define P1DR PORT_pointer->p1dr #define P2DR PORT_pointer->p2dr #define P3DDR PORT_pointer->p3ddr #define P4DDR PORT_pointer->p4ddr #define P3DR PORT_pointer->p3dr #define P4DR PORT_pointer->p4dr #define P5DDR PORT_pointer->p5ddr #define P6DDR PORT_pointer->p6ddr #define P5DR PORT_pointer->p5dr #define P6DR PORT_pointer->p6dr #define P8DDR PORT_pointer->p8ddr #define P7DR PORT_pointer->p7dr #define P8DR PORT_pointer->p8dr #define P9DDR PORT_pointer->p9ddr #define PADDR PORT_pointer->paddr #define P9DR PORT_pointer->p9dr #define PADR PORT_pointer->padr #define PBDDR PORT_pointer->pbddr #define PBDR PORT_pointer->pbdr #define P2PCR PORT_pointer->p2pcr #define P4PCR PORT_pointer->p4pcr #define P5PCR PORT_pointer->p5pcr #endif /* LANGUAGE == C */ #define P1DDR_OFFSET 0x00 #define P2DDR_OFFSET 0x01 #define P1DR_OFFSET 0x02 #define P2DR_OFFSET 0x03 #define P3DDR_OFFSET 0x04 #define P4DDR_OFFSET 0x05 #define P3DR_OFFSET 0x06 #define P4DR_OFFSET 0x07 #define P5DDR_OFFSET 0x08 #define P6DDR_OFFSET 0x09 #define P5DR_OFFSET 0x0a #define P6DR_OFFSET 0x0b #define P8DDR_OFFSET 0x0d #define P7DR_OFFSET 0x0e #define P8DR_OFFSET 0x0f #define P9DDR_OFFSET 0x10 #define PADDR_OFFSET 0x11 #define P9DR_OFFSET 0x12 #define PADR_OFFSET 0x13 #define PBDDR_OFFSET 0x14 #define PBDR_OFFSET 0x16 #define P2PCR_OFFSET 0x18 #define P4PCR_OFFSET 0x1a #define P5PCR_OFFSET 0x1b /* P1DDR bits */ #define P1DDR_P17DDR bit(7) #define P1DDR_P16DDR bit(6) #define P1DDR_P15DDR bit(5) #define P1DDR_P14DDR bit(4) #define P1DDR_P13DDR bit(3) #define P1DDR_P12DDR bit(2) #define P1DDR_P11DDR bit(1) #define P1DDR_P10DDR bit(0) /* P1DR bits */ #define P1DR_P17 bit(7) #define P1DR_P16 bit(6) #define P1DR_P15 bit(5) #define P1DR_P14 bit(4) #define P1DR_P13 bit(3) #define P1DR_P12 bit(2) #define P1DR_P11 bit(1) #define P1DR_P10 bit(0) /* P2DDR bits */ #define P2DDR_P27DDR bit(7) #define P2DDR_P26DDR bit(6) #define P2DDR_P25DDR bit(5) #define P2DDR_P24DDR bit(4) #define P2DDR_P23DDR bit(3) #define P2DDR_P22DDR bit(2) #define P2DDR_P21DDR bit(1) #define P2DDR_P20DDR bit(0) /* P2DR bits */ #define P2DR_P27 bit(7) #define P2DR_P26 bit(6) #define P2DR_P25 bit(5) #define P2DR_P24 bit(4) #define P2DR_P23 bit(3) #define P2DR_P22 bit(2) #define P2DR_P21 bit(1) #define P2DR_P20 bit(0) /* P3DDR bits */ #define P3DDR_P37DDR bit(7) #define P3DDR_P36DDR bit(6) #define P3DDR_P35DDR bit(5) #define P3DDR_P34DDR bit(4) #define P3DDR_P33DDR bit(3) #define P3DDR_P32DDR bit(2) #define P3DDR_P31DDR bit(1) #define P3DDR_P30DDR bit(0) /* P3DR bits */ #define P3DR_P37 bit(7) #define P3DR_P36 bit(6) #define P3DR_P35 bit(5) #define P3DR_P34 bit(4) #define P3DR_P33 bit(3) #define P3DR_P32 bit(2) #define P3DR_P31 bit(1) #define P3DR_P30 bit(0) /* P4DDR bits */ #define P4DDR_P47DDR bit(7) #define P4DDR_P46DDR bit(6) #define P4DDR_P45DDR bit(5) #define P4DDR_P44DDR bit(4) #define P4DDR_P43DDR bit(3) #define P4DDR_P42DDR bit(2) #define P4DDR_P41DDR bit(1) #define P4DDR_P40DDR bit(0) /* P4DR bits */ #define P4DR_P47 bit(7) #define P4DR_P46 bit(6) #define P4DR_P45 bit(5) #define P4DR_P44 bit(4) #define P4DR_P43 bit(3) #define P4DR_P42 bit(2) #define P4DR_P41 bit(1) #define P4DR_P40 bit(0) /* P5DDR bits */ #define P5DDR_P53DDR bit(3) #define P5DDR_P52DDR bit(2) #define P5DDR_P51DDR bit(1) #define P5DDR_P50DDR bit(0) /* P5DR bits */ #define P5DR_P53 bit(3) #define P5DR_P52 bit(2) #define P5DR_P51 bit(1) #define P5DR_P50 bit(0) /* P6DDR bits */ #define P6DDR_P66DDR bit(6) #define P6DDR_P65DDR bit(5) #define P6DDR_P64DDR bit(4) #define P6DDR_P63DDR bit(3) #define P6DDR_P62DDR bit(2) #define P6DDR_P61DDR bit(1) #define P6DDR_P60DDR bit(0) /* P6DR bits */ #define P6DR_P66 bit(6) #define P6DR_P65 bit(5) #define P6DR_P64 bit(4) #define P6DR_P63 bit(3) #define P6DR_P62 bit(2) #define P6DR_P61 bit(1) #define P6DR_P60 bit(0) /* P7DR bits */ #define P7DR_P77 bit(7) #define P7DR_P76 bit(6) #define P7DR_P75 bit(5) #define P7DR_P74 bit(4) #define P7DR_P73 bit(3) #define P7DR_P72 bit(2) #define P7DR_P71 bit(1) #define P7DR_P70 bit(0) /* P8DDR bits */ #define P8DDR_P84DDR bit(4) #define P8DDR_P83DDR bit(3) #define P8DDR_P82DDR bit(2) #define P8DDR_P81DDR bit(1) #define P8DDR_P80DDR bit(0) /* P8DR bits */ #define P8DR_P84 bit(4) #define P8DR_P83 bit(3) #define P8DR_P82 bit(2) #define P8DR_P81 bit(1) #define P8DR_P80 bit(0) /* P9DDR bits */ #define P9DDR_P95DDR bit(5) #define P9DDR_P94DDR bit(4) #define P9DDR_P93DDR bit(3) #define P9DDR_P92DDR bit(2) #define P9DDR_P91DDR bit(1) #define P9DDR_P90DDR bit(0) /* P9DR bits */ #define P9DR_P95 bit(5) #define P9DR_P94 bit(4) #define P9DR_P93 bit(3) #define P9DR_P92 bit(2) #define P9DR_P91 bit(1) #define P9DR_P90 bit(0) /* PADDR bits */ #define PADDR_PA7DDR bit(7) #define PADDR_PA6DDR bit(6) #define PADDR_PA5DDR bit(5) #define PADDR_PA4DDR bit(4) #define PADDR_PA3DDR bit(3) #define PADDR_PA2DDR bit(2) #define PADDR_PA1DDR bit(1) #define PADDR_PA0DDR bit(0) /* PADR bits */ #define PADR_PA7 bit(7) #define PADR_PA6 bit(6) #define PADR_PA5 bit(5) #define PADR_PA4 bit(4) #define PADR_PA3 bit(3) #define PADR_PA2 bit(2) #define PADR_PA1 bit(1) #define PADR_PA0 bit(0) /* PBDDR bits */ #define PBDDR_PB7DDR bit(7) #define PBDDR_PB6DDR bit(6) #define PBDDR_PB5DDR bit(5) #define PBDDR_PB4DDR bit(4) #define PBDDR_PB3DDR bit(3) #define PBDDR_PB2DDR bit(2) #define PBDDR_PB1DDR bit(1) #define PBDDR_PB0DDR bit(0) /* PBDR bits */ #define PBDR_PB7 bit(7) #define PBDR_PB6 bit(6) #define PBDR_PB5 bit(5) #define PBDR_PB4 bit(4) #define PBDR_PB3 bit(3) #define PBDR_PB2 bit(2) #define PBDR_PB1 bit(1) #define PBDR_PB0 bit(0) /* P2PCR bits */ #define P2PCR_P27PCR bit(7) #define P2PCR_P26PCR bit(6) #define P2PCR_P25PCR bit(5) #define P2PCR_P24PCR bit(4) #define P2PCR_P23PCR bit(3) #define P2PCR_P22PCR bit(2) #define P2PCR_P21PCR bit(1) #define P2PCR_P20PCR bit(0) /* P4PCR bits */ #define P4PCR_P47PCR bit(7) #define P4PCR_P46PCR bit(6) #define P4PCR_P45PCR bit(5) #define P4PCR_P44PCR bit(4) #define P4PCR_P43PCR bit(3) #define P4PCR_P42PCR bit(2) #define P4PCR_P41PCR bit(1) #define P4PCR_P40PCR bit(0) /* P5PCR bits */ #define P5PCR_P53PCR bit(3) #define P5PCR_P52PCR bit(2) #define P5PCR_P51PCR bit(1) #define P5PCR_P50PCR bit(0) #endif /* H83048_PORTS_H */ --- NEW FILE: ic.h --- /* * $Id: ic.h,v 1.1 2005/06/01 14:15:40 brano111 Exp $ * * H8/3048 Interrupt Controller (IC) Registers * Copyright (C) 2005 Elcom s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the copyright holders nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Branislav Petrovsky <bra...@sz...>, 2005. * * Documentation: * [1] Renesas Technology Corp., "Hitachi Single-Chip Microcomputer * H8/3048 Series, H8/3048F-ZTAT Hardware Manual", * Rev. 6.0, 9/3/2002, Order Number: ADE-602-073E * */ #ifndef H83048_IC_H #define H83048_IC_H #include <common.h> #if LANGUAGE == C #include <stdint.h> #endif /* IC registers */ #define IC_BASE 0xfffff4 #if LANGUAGE == C typedef struct IC_registers { uint8_t iscr; uint8_t ier; uint8_t isr; uint8_t __reserved; uint8_t ipra; uint8_t iprb; } IC_registers_t; #define IC_pointer ((IC_registers_t*) IC_BASE) #define ISCR IC_pointer->iscr #define IER IC_pointer->ier #define ISR IC_pointer->isr #define IPRA IC_pointer->ipra #define IPRB IC_pointer->iprb #endif /* LANGUAGE == C */ #define ISCR_OFFSET 0x00 #define IER_OFFSET 0x01 #define ISR_OFFSET 0x02 #define IPRA_OFFSET 0x04 #define IPRB_OFFSET 0x05 /* ISCR bits */ #define ISCR_IRQ5SC bit(5) #define ISCR_IRQ4SC bit(4) #define ISCR_IRQ3SC bit(3) #define ISCR_IRQ2SC bit(2) #define ISCR_IRQ1SC bit(1) #define ISCR_IRQ0SC bit(0) /* IER bits */ #define IER_IRQ5E bit(5) #define IER_IRQ4E bit(4) #define IER_IRQ3E bit(3) #define IER_IRQ2E bit(2) #define IER_IRQ1E bit(1) #define IER_IRQ0E bit(0) /* ISR bits */ #define ISR_IRQ5F bit(5) #define ISR_IRQ4F bit(4) #define ISR_IRQ3F bit(3) #define ISR_IRQ2F bit(2) #define ISR_IRQ1F bit(1) #define ISR_IRQ0F bit(0) /* IPRA bits */ #define IPRA_IPRA7 bit(7) #define IPRA_IPRA6 bit(6) #define IPRA_IPRA5 bit(5) #define IPRA_IPRA4 bit(4) #define IPRA_IPRA3 bit(3) #define IPRA_IPRA2 bit(2) #define IPRA_IPRA1 bit(1) #define IPRA_IPRA0 bit(0) /* IPRB bits */ #define IPRB_IPRB7 bit(7) #define IPRB_IPRB6 bit(6) #define IPRB_IPRB5 bit(5) #define IPRB_IPRB3 bit(3) #define IPRB_IPRB2 bit(2) #define IPRB_IPRB1 bit(1) #endif /* H83048_IC_H */ --- NEW FILE: itu.h --- /* * $Id: itu.h,v 1.1 2005/06/01 14:15:40 brano111 Exp $ * * H8/3048 ITU Registers * Copyright (C) 2005 Elcom s.r.o. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the copyright holders nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Written by Branislav Petrovsky <bra...@sz...>, 2005. * * Documentation: * [1] Renesas Technology Corp., "Hitachi Single-Chip Microcomputer * H8/3048 Series, H8/3048F-ZTAT Hardware Manual", * Rev. 6.0, 9/3/2002, Order Number: ADE-602-073E * */ #ifndef H83048_ITU_H #define H83048_ITU_H #include <common.h> #if LANGUAGE == C #include <stdint.h> #endif /* ITU registers */ #define ITU_COMMON1_BASE 0xffff60 #define ITU_COMMON2_BASE 0xffff90 #define ITU0_BASE 0xffff64 #define ITU1_BASE 0xffff6e #define ITU2_BASE 0xffff78 #define ITU3_BASE 0xffff82 #define ITU4_BASE 0xffff92 #if LANGUAGE == C typedef struct ITU_registers { uint8_t tcr; uint8_t tior; uint8_t tier; uint8_t tsr; uint8_t tcnth; uint8_t tcntl; uint8_t grah; uint8_t gral; uint8_t grbh; uint8_t grbl; uint8_t brah; /* only ITU channel 3 and 4 */ uint8_t bral; /* only ITU channel 3 and 4 */ uint8_t brbh; /* only ITU channel 3 and 4 */ uint8_t brbl; /* only ITU channel 3 and 4 */ } ITU_registers_t; typedef struct ITU_common1_registers { uint8_t tstr; uint8_t tsnc; uint8_t tmdr; uint8_t tfcr; } ITU_common1_registers_t; typedef struct ITU_common2_registers { uint8_t toer; uint8_t tocr; } ITU_common2_registers_t; #define ITU_COMMON1_pointer ((ITU_common1_registers_t*) ITU_COMMON1_BASE) #define ITU_COMMON2_pointer ((ITU_common2_registers_t*) ITU_COMMON2_BASE) #define ITU0_pointer ((ITU_registers_t*) ITU0_BASE) #define ITU1_pointer ((ITU_registers_t*) ITU1_BASE) #define ITU2_pointer ((ITU_registers_t*) ITU2_BASE) #define ITU3_pointer ((ITU_registers_t*) ITU3_BASE) #define ITU4_pointer ((ITU_registers_t*) ITU4_BASE) #define TCR0 ITU0_pointer->tcr #define TIOR0 ITU0_pointer->tior #define TIER0 ITU0_pointer->tier #define TSR0 ITU0_pointer->tsr #define TCNT0H ITU0_pointer->tcnth #define TCNT0L ITU0_pointer->tcntl #define GRA0H ITU0_pointer->grah #define GRA0L ITU0_pointer->gral #define GRB0H ITU0_pointer->grbh #define GRB0L ITU0_pointer->grbl #define TCR1 ITU1_pointer->tcr #define TIOR1 ITU1_pointer->tior #define TIER1 ITU1_pointer->tier #define TSR1 ITU1_pointer->tsr #define TCNT1H ITU1_pointer->tcnth #define TCNT1L ITU1_pointer->tcntl #define GRA1H ITU1_pointer->grah #define GRA1L ITU1_pointer->gral #define GRB1H ITU1_pointer->grbh #define GRB1L ITU1_pointer->grbl #define TCR2 ITU2_pointer->tcr #define TIOR2 ITU2_pointer->tior #define TIER2 ITU2_pointer->tier #define TSR2 ITU2_pointer->tsr #define TCNT2H ITU2_pointer->tcnth #define TCNT2L ITU2_pointer->tcntl #define GRA2H ITU2_pointer->grah #define GRA2L ITU2_pointer->gral #define GRB2H ITU2_pointer->grbh #define GRB2L ITU2_pointer->grbl #define TCR3 ITU3_pointer->tcr #define TIOR3 ITU3_pointer->tior #define TIER3 ITU3_pointer->tier #define TSR3 ITU3_pointer->tsr #define TCNT3H ITU3_pointer->tcnth #define TCNT3L ITU3_pointer->tcntl #define GRA3H ITU3_pointer->grah #define GRA3L ITU3_pointer->gral #define GRB3H ITU3_pointer->grbh #define GRB3L ITU3_pointer->grbl #define BRA3H ITU3_pointer->brah #define BRA3L ITU3_pointer->bral #define BRB3H ITU3_pointer->brbh #define BRB3L ITU3_pointer->brbl #define TCR4 ITU4_pointer->tcr #define TIOR4 ITU4_pointer->tior #define TIER4 ITU4_pointer->tier #define TSR4 ITU4_pointer->tsr #define TCNT4H ITU4_pointer->tcnth #define TCNT4L ITU4_pointer->tcntl #define GRA4H ITU4_pointer->grah #define GRA4L ITU4_pointer->gral #define GRB4H ITU4_pointer->grbh #define GRB4L ITU4_pointer->grbl #define BRA4H ITU4_pointer->brah #define BRA4L ITU4_pointer->bral #define BRB4H ITU4_pointer->brbh #define BRB4L ITU4_pointer->brbl #define TSTR ITU_COMMON1_pointer->tstr #define TSNC ITU_COMMON1_pointer->tsnc #define TMDR ITU_COMMON1_pointer->tmdr #define TFCR ITU_COMMON1_pointer->tfcr #define TOER ITU_COMMON2_pointer->toer #define TOCR ITU_COMMON2_pointer->tocr #endif /* LANGUAGE == C */ #define TCR_OFFSET 0x00 #define TIOR_OFFSET 0x01 #define TIER_OFFSET 0x02 #define TSR_OFFSET 0x03 #define TCNTH_OFFSET 0x04 #define TCNTL_OFFSET 0x05 #define GRAH_OFFSET 0x06 #define GRAL_OFFSET 0x07 #define GRBH_OFFSET 0x08 #define GRBL_OFFSET 0x09 #define BRAH_OFFSET 0x0a #define BRAL_OFFSET 0x0b #define BRBH_OFFSET 0x0c #define BRBL_OFFSET 0x0d #define TSTR_OFFSET 0x00 #define TSNC_OFFSET 0x01 #define TMDR_OFFSET 0x02 #define TFCR_OFFSET 0x03 #define TOER_OFFSET 0x00 #define TOCR_OFFSET 0x01 #endif /* H83048_ITU_H */ |
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From: Branislav P. <bra...@us...> - 2005-06-01 14:15:48
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Update of /cvsroot/openwince/include In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv25222 Modified Files: ChangeLog Makefile.am NEWS Log Message: 2005-06-01 Branislav Petrovsky <bra...@sz...> * h8/h83048/adc.h: New file. * h8/h83048/dac.h: Ditto. * h8/h83048/dmac.h: Ditto. * h8/h83048/flash.h: Ditto. * h8/h83048/ic.h: Ditto. * h8/h83048/itu.h: Ditto. * h8/h83048/other.h: Ditto. * h8/h83048/ports.h: Ditto. * h8/h83048/sci.h: Ditto. * Makefile.am (nobase_openwinceinc_HEADERS): Added new files. Index: NEWS =================================================================== RCS file: /cvsroot/openwince/include/NEWS,v retrieving revision 1.45 retrieving revision 1.46 diff -u -d -r1.45 -r1.46 --- NEWS 27 May 2005 12:12:06 -0000 1.45 +++ NEWS 1 Jun 2005 14:15:39 -0000 1.46 @@ -2,6 +2,7 @@ include-0.3.3: + * Added Renesas H8/3048 registers. * Added Renesas H8S/2357 registers. * Added Renesas SH7750 CCN registers. * Added Hitiachi HD64461 registers. Index: Makefile.am =================================================================== RCS file: /cvsroot/openwince/include/Makefile.am,v retrieving revision 1.29 retrieving revision 1.30 diff -u -d -r1.29 -r1.30 --- Makefile.am 31 May 2005 11:46:32 -0000 1.29 +++ Makefile.am 1 Jun 2005 14:15:39 -0000 1.30 @@ -86,6 +86,15 @@ device/other/hd64461/pcc.h \ device/other/hd64461/stbsys.h \ device/other/hd64461/timer.h \ + h8/h83048/adc.h \ + h8/h83048/dac.h \ + h8/h83048/dmac.h \ + h8/h83048/flash.h \ + h8/h83048/ic.h \ + h8/h83048/itu.h \ + h8/h83048/other.h \ + h8/h83048/ports.h \ + h8/h83048/sci.h \ h8/h8s2357/adc.h \ h8/h8s2357/bus.h \ h8/h8s2357/dac.h \ Index: ChangeLog =================================================================== RCS file: /cvsroot/openwince/include/ChangeLog,v retrieving revision 1.63 retrieving revision 1.64 diff -u -d -r1.63 -r1.64 --- ChangeLog 1 Jun 2005 10:06:02 -0000 1.63 +++ ChangeLog 1 Jun 2005 14:15:39 -0000 1.64 @@ -1,5 +1,18 @@ 2005-06-01 Branislav Petrovsky <bra...@sz...> + * h8/h83048/adc.h: New file. + * h8/h83048/dac.h: Ditto. + * h8/h83048/dmac.h: Ditto. + * h8/h83048/flash.h: Ditto. + * h8/h83048/ic.h: Ditto. + * h8/h83048/itu.h: Ditto. + * h8/h83048/other.h: Ditto. + * h8/h83048/ports.h: Ditto. + * h8/h83048/sci.h: Ditto. + * Makefile.am (nobase_openwinceinc_HEADERS): Added new files. + +2005-06-01 Branislav Petrovsky <bra...@sz...> + * h8/h8s2357/wdt.h (__reserved): Fixed variable type. 2005-06-01 Branislav Petrovsky <bra...@sz...> |
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From: Branislav P. <bra...@us...> - 2005-06-01 14:04:17
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Update of /cvsroot/openwince/include/h8/h83048 In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv19263/h83048 Log Message: Directory /cvsroot/openwince/include/h8/h83048 added to the repository |
