Hi everyone,
I have a system with a Xilinx Zynq (xc7z020) that has an external QSPI NOR Flash. Do you know if it's already possible to read write the Flash module?
I have already googled a lot but haven't found any hints how to achieve this. The code base does not seem to provide this feature, although I'm not too familiar with it. If it is not implemented yet, could you guide me what exactly needs to be done to get this working?
Fortunately the Flash chip is already present in src/flash/nor/spi.c
BR Dom
Von: "Dominik Wernberger" <dom3e@users.sourceforge.net>
An: openocd-devel@lists.sourceforge.net
Betreff: [openocd:tickets] #400 Xilinx Zynq: Read/Write external QSPI Flash
[tickets:#400] Xilinx Zynq: Read/Write external QSPI Flash
Status: new
Milestone: 0.10.0
Created: Mon Jun 05, 2023 06:20 PM UTC by Dominik Wernberger
Last Updated: Mon Jun 05, 2023 06:20 PM UTC
Owner: nobody
Hi everyone,
I have a system with a Xilinx Zynq (xc7z020) that has an external QSPI NOR Flash. Do you know if it's already possible to read write the Flash module?
I have already googled a lot but haven't found any hints how to achieve this. The code base does not seem to provide this feature, although I'm not too familiar with it. If it is not implemented yet, could you guide me what exactly needs to be done to get this working?
Fortunately the Flash chip is already present in
src/flash/nor/spi.cBR Dom
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You could try to port https://review.openocd.org/c/openocd/+/4760 to Cortex-A. Problem is to be able to use e.g. target_run_flash_async_algorithm and friends (in src/target.c). There's already a helper script gpio_conf_zynq.pl included but currently I've no spare time to address that.
First of all thank you both for your quick responses.
I will consider both options and how much effort it is to implement.
Andreas, may I ask how long it took you to implement a basic proof of concept of your driver? (just a rough estimate)
Well, as the initial version (simple SPI) was largely copy-and-paste from my stmqspi driver, two weekends as far as I remember (the most cumbersome parts were I2C and UNI/O interface). BUT: All required infrastructure in OpenOCD for Cortex-M was already there. Can't say anything about Cortex-A in this respect.