I recently updated OpenOCD (supplied by Zephyr SDK) from 0.11.0+dev-00244-g7e3dbbbe2 (2021-11-18-07:14) to 0.11.0+dev-00724-g42b6471c1 (2022-08-17-18:23). The new version is not able to flash my TI3235SF launchXL development kit board with an integrated XDS110 debugger via SWD.
The default log output looks like this:
Open On-Chip Debugger 0.11.0+dev-00724-g42b6471c1 (2022-08-17-18:23)
(...)
ocd_process_reset_inner
Info : XDS110: connected
Info : XDS110: vid/pid = 0451/bef3
Info : XDS110: firmware version = 3.0.0.18
Info : XDS110: hardware version = 0x0027
Info : XDS110: connected to target via SWD
Info : XDS110: SWCLK set to 2500 kHz
Info : clock speed 8500 kHz
Info : SWD DPIDR 0x2ba01477
Info : [cc32xx.cpu] Cortex-M4 r0p1 processor detected
Info : [cc32xx.cpu] target has 6 breakpoints, 4 watchpoints
Info : starting gdb server for cc32xx.cpu on 3333
Info : Listening on port 3333 for gdb connections
TargetName Type Endian TapName State
-- ------------------ ---------- ------ ------------------ ------------
0* cc32xx.cpu cortex_m little cc32xx.cpu running
requesting target halt and executing a soft reset
Error: Could not write to register 'msp'
Info : XDS110: disconnected
The full log output with -d3 can be found at https://pastebin.com/R8wcFjhK.
Following a discussion on IRC, Paul Fertser suggested to add "halt" after "soft_reset_halt" in openocd/scripts/target/ti_cc3220sf.cfg
, which fixes the issue for me.
Link seems to be broken. Gives me a 404 error.
edit: ah, it was the period/full stop that was messing the link up.
https://pastebin.com/R8wcFjhK
Last edit: Tommy Murphy 2022-08-31
Sourceforge mistakenly added the trailing dot to the link. Simply remove it and the link should work.
Please try 8285: target/cortex_m: allow poll quickly get out of TARGET_RESET state | https://review.openocd.org/c/openocd/+/8285