[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1279-g52ac91a73

[openocd-gerrit <ope...@us...>]

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  52ac91a73e19759a74bf4b834225fba7c6a95084 (commit)
      from  8c410704154c28ca4354d85233ed76a29a031322 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 52ac91a73e19759a74bf4b834225fba7c6a95084
Author: Antonio Borneo <bor...@gm...>
Date:   Tue Oct 7 14:03:15 2025 +0200

    target: riscv: move the SMP commands under riscv
    
    For all the targets that support SMP, the sub-commands 'smp' and
    'smp_gdb' are under the arch name:
    - aarch64 smp
    - cortex_a smp
    - cortex_m smp
    - esp32 smp
    - mips_m4k smp
    
    Keep consistency among OpenOCD commands, and move under the arch
    name 'riscv' the SMP subcommands.
    
    Change-Id: Iede7841c2df8161ff2c6fea3be561d1f26ad6cd0
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/9165
    Reviewed-by: Evgeniy Naydanov <evg...@sy...>
    Reviewed-by: Tomas Vanek <va...@fb...>
    Tested-by: jenkins

diff --git a/doc/openocd.texi b/doc/openocd.texi
index 54cf21a29..f2ffa3a75 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -11800,16 +11800,16 @@ When utilizing version 0.11 of the RISC-V Debug Specification,
 and DBUS registers, respectively.
 @end deffn
 
-@deffn {Command} {smp} [on|off]
+@deffn {Command} {riscv smp} [on|off]
 Display, enable or disable SMP handling mode. This command is needed only if
 user wants to temporary @b{disable} SMP handling for an existing SMP group
 (see @code{aarch64 smp} for additional information). To define an SMP
 group the command @code{target smp} should be used.
 @end deffn
 
-@deffn {Command} {smp_gdb} [core_id]
+@deffn {Command} {riscv smp_gdb} [core_id]
 Display/set the current core displayed in GDB. This is needed only if
-@code{smp} was used.
+@code{riscv smp} was used.
 @end deffn
 
 @deffn {Config Command} {riscv use_bscan_tunnel} width [type]
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index 07aa578a5..d6b5804a6 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -5838,6 +5838,9 @@ static const struct command_registration riscv_exec_command_handlers[] = {
 			"When off, users need to take care of memory coherency themselves, for example by using "
 			"`riscv exec_progbuf` to execute fence or CMO instructions."
 	},
+	{
+		.chain = smp_command_handlers
+	},
 	COMMAND_REGISTRATION_DONE
 };
 
@@ -5870,9 +5873,6 @@ static const struct command_registration riscv_command_handlers[] = {
 		.usage = "",
 		.chain = semihosting_common_handlers
 	},
-	{
-		.chain = smp_command_handlers
-	},
 	COMMAND_REGISTRATION_DONE
 };
 

-----------------------------------------------------------------------

Summary of changes:
 doc/openocd.texi         | 6 +++---
 src/target/riscv/riscv.c | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)


hooks/post-receive
-- 
Main OpenOCD repository