[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-153-g3dfc0339f

[openocd-gerrit <ope...@us...>]

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  3dfc0339fc85d467bed5cd435bb953bc7d3b9343 (commit)
      from  2096afc1b031280107ada81fb729d5e7c9075626 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 3dfc0339fc85d467bed5cd435bb953bc7d3b9343
Author: Julien Massot <jul...@io...>
Date:   Wed Jan 12 09:53:06 2022 +0100

    tcl/target: renesas gen3 Set target to armv8r for Cortex-R52
    
    Cortex-R52 is an ARMv8-R processor supporting only
    AArch32 Profile.
    
    Signed-off-by: Julien Massot <jul...@io...>
    Change-Id: I663ae4bf1d3026d7c9e4c5950a79e7ddf1bd6564
    Reviewed-on: https://review.openocd.org/c/openocd/+/6805
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/target/renesas_rcar_gen3.cfg b/tcl/target/renesas_rcar_gen3.cfg
index 3e449832f..8dc0e7a0d 100644
--- a/tcl/target/renesas_rcar_gen3.cfg
+++ b/tcl/target/renesas_rcar_gen3.cfg
@@ -156,15 +156,20 @@ proc setup_a5x {core_name dbgbase ctibase num boot} {
 	}
 }
 
-proc setup_cr7 {core_name dbgbase ctibase num boot} {
+proc setup_crx {core_name dbgbase ctibase num boot} {
 	global _CHIPNAME
 	global _DAPNAME
 	for { set _core 0 } { $_core < $num } { incr _core } {
 		set _TARGETNAME $_CHIPNAME.$core_name
 		set _CTINAME $_TARGETNAME.cti
 		cti create $_CTINAME -dap $_DAPNAME -ap-num 1 -baseaddr $ctibase
-		set _command "target create $_TARGETNAME cortex_r4 -dap $_DAPNAME \
-			-ap-num 1 -dbgbase $dbgbase"
+		if { $core_name == "r52" } {
+			set _command "target create $_TARGETNAME armv8r -dap $_DAPNAME \
+				-ap-num 1 -dbgbase $dbgbase -cti $_CTINAME"
+		} else {
+			set _command "target create $_TARGETNAME cortex_r4 -dap $_DAPNAME \
+				-ap-num 1 -dbgbase $dbgbase"
+		}
 		if { $boot == 1 } {
 			set _targets "$_TARGETNAME"
 		} else {
@@ -177,20 +182,20 @@ proc setup_cr7 {core_name dbgbase ctibase num boot} {
 # Organize target list based on the boot core
 if { [string equal $_boot_core CA76] } {
 	setup_a5x a76 $CA76_DBGBASE $CA76_CTIBASE $_num_ca76 1
-	setup_cr7 r52 $CR52_DBGBASE $CR52_CTIBASE $_num_cr52 0
+	setup_crx r52 $CR52_DBGBASE $CR52_CTIBASE $_num_cr52 0
 } elseif { [string equal $_boot_core CA57] } {
 	setup_a5x a57 $CA57_DBGBASE $CA57_CTIBASE $_num_ca57 1
 	setup_a5x a53 $CA53_DBGBASE $CA53_CTIBASE $_num_ca53 0
-	setup_cr7 r7  $CR7_DBGBASE  $CR7_CTIBASE  $_num_cr7  0
+	setup_crx r7  $CR7_DBGBASE  $CR7_CTIBASE  $_num_cr7  0
 } elseif { [string equal $_boot_core CA53] } {
 	setup_a5x a53 $CA53_DBGBASE $CA53_CTIBASE $_num_ca53 1
 	setup_a5x a57 $CA57_DBGBASE $CA57_CTIBASE $_num_ca57 0
-	setup_cr7 r7  $CR7_DBGBASE  $CR7_CTIBASE  $_num_cr7  0
+	setup_crx r7  $CR7_DBGBASE  $CR7_CTIBASE  $_num_cr7  0
 } elseif { [string equal $_boot_core CR52] } {
-	setup_cr7 r52 $CR52_DBGBASE $CR52_CTIBASE $_num_cr52 1
+	setup_crx r52 $CR52_DBGBASE $CR52_CTIBASE $_num_cr52 1
 	setup_a5x a76 $CA76_DBGBASE $CA76_CTIBASE $_num_ca76 0
 } else {
-	setup_cr7 r7  $CR7_DBGBASE  $CR7_CTIBASE  $_num_cr7  1
+	setup_crx r7  $CR7_DBGBASE  $CR7_CTIBASE  $_num_cr7  1
 	setup_a5x a57 $CA57_DBGBASE $CA57_CTIBASE $_num_ca57 0
 	setup_a5x a53 $CA53_DBGBASE $CA53_CTIBASE $_num_ca53 0
 }

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/renesas_rcar_gen3.cfg | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)


hooks/post-receive
-- 
Main OpenOCD repository