[Opencxx-users] Re: [Synopsis-devel] refining the Synopsis APIs

[Vladimir P. <gh...@cs...>]

On Tuesday 26 October 2004 08:16, Stefan Seefeld wrote:

> The Abstract Semantic Graph (*ASG*) is a structure that is built from
> the AST (or PTree), but where identifiers are cross-referenced to their
> respective declarations (thus it's a graph, not a tree). 

I think that "Abstract" and  "Semantic" words are all very confusing. 
Basically, you description of ASG says it's just a set of interlinked C++ 
objects. Semantic could mean anything, including operational semantic (how 
i+1 is prorcessed and so on). I'd suggest to name this module just "Objects", 
or "Entities", to avoid further confusion.

> Also, at this 
> level of abstraction there is very little connection to the syntax, so
> the type hierarchy can be simplified (compared to the ugly mix of type,
> identifier, and other tokens that C++ declarations usually are made of).
> Construction of the ASG is done by traversing the AST while looking up
> symbols in the SymbolTable. It is done after the parsing has finished.

Traversing AST or PTree? The difference between the too is confusing as well. 
If PTree is just a grouping of input tokens into blocks (class definitions, 
functions), and "Entities" is high-level classes and functions (no trace of 
syntax), then there's very little place left for any other layer. 

I'm still not sure that this reprsentation can be constructed after parsing. 
We've talked with you that during parsing you need to instantiate templates, 
and it's not clear if PTree representation is rich enough to handle such 
functionality.

In fact, now that you've sketched the diagram and explained they layers, I 
think we need to agree what PTree does. For example:

PTree -- just grouping of tokens, as little semantic information as possible.
Entities -- reach semantic information, including logic for instantiating 
templates, template argument deduction and so on.

Given that, it's not all clear that Entiries are constructed after parsing. 
Given an appropriate design of "Processor", the steps can be interleaved. 

- Volodya