This looks interesting. Thanks for all the pointers!
I enabled the Wiki functionality on the SF site  and collected most
of the posted links. It's still read-only for non-members...
I also added an article for building a cross toolchain (gcc-4.1.1 /
binutils-2.17) solely using Debian tools. It has been successfully done
that way on a x86 here.
Thanx again. Good work on the Wiki... I'll be trying to build a kernel the 'Debian way' soon. I am almost to the point of trying out a few changes.. I'll probably be at the point of building some 1400-specific kernels (which probably won't work)next week if I have time... I just need to figure out which files need to be revised. I'll be working off the 2.4 tree, but with a bunch of changes. I fear that some things need to be written from scratch, but I have a general idea of what needs to be done. My MacOS debugging tools are... er... buggy, so I have been hindered by that while trying to verify hardware addresses.
Here are some assumptions that I am going to work on: The powerbook has only a VIA1 register (which I assume works just like a real 6522... hopefully without the shift register problems), and although RBV (ram based video that also handles emulated VIA2 duties) shows up in the gestalts and not a VIA2 or OSS, it does not use RBV for the display (as we know, the framebuffer has it's own 1M of RAM), so I ASSUME that RBV is acting like the VIA2 register like a Quadra/Centris (which puts it in the pain-in-the-butt interrupts category), and I am going to try that assumption out... thgis is unlike the x100 series, which i THINK has a pair of 6522 for VIA1/VIA2. The other assumption that I am working on is that although the hardware has no DMA, you need to ACT like it does and just plug in the addresses for the sake of the kernel and do somethng tricky... I am not sure about this, but we'll see.
For anyone's reference, i THINK that I have a bunch of the hardware addresses, but I am not positive... I just figured them out with a calculator under the assumption that Apple stuck with the old scheme and stepping, so they could be TOTALLY wrong, but i will list them in case anyone else wants to check them out by either checking the addresses in a debugger or checking for the driver pointers in a disassembler or whatever. I marked the addresses that have a pointer in low-mem with an * , so there is at least SOMETHING there... but the others I have not verified yet. I just ran with the assumption that Apple had not moved all the addresses from the older Mac models, and actually found them to be the same, so I will be digging up some more old info and chacking it against my machine. I am ALSO hoping that these are active addresses, and not dead ends that were left over from older versions of the ROM (not likely).
device = address = low memory pointer
(*) means that I confirmed it by dissassembling the code at that pointer address
*I/O base(should be the VIA1) = 0x50F00000 = $1D4
I/O size = 0x42000
*SCSI handshake = 0x50F06000 = $0C08
*IWM base = 0x50F16000 = $1E0
*??SCSI chip read base?? = 0x50F10000 = $0C00
*ROM base = 0x40000000 = $2AE
*RAM base = 0x00002800 = $2B2
*Power manager vars base = 0x000A2290 = $0D18
*Sound bitmap base = 0x50F14000 = $266
*SCC read base = 50F04000 50F04000 50F16000 DFC3261F = $1D8
*SCC write base = 50F04000 50F04000 DFC3261F 4E75CC0A = $1DC
(If the VIA2 is RBV, then it should be hanging out at 50f26000, but I found a pointer to a VIA2 at 50F02000 (pointer at $000000CEC))
*vector to slot VBL task interrupt handler = 001CC0E4 00389480 FFFF0000 341CFFFF = $0D28
Some other useful things that I spotted:
*Pointer to time = $20C
*Pointer to Tick count = $16A
*Pointer to VBL queue header = $160
These are unverified... just wildly guessing here:
IDE 0 = 0x50F1A000
Interrupt control register = 0x50F2A000
VIA1 Interrupt Flag Register = 0x50F01A00
VIA1 Interrupt Enable Register = 0x50F01C00
VIA1 Peripheral Control Register = 0x50F01800
VIA1 Auxiliary Control Register = 0x50F01600
VIA1 T1 Low Order Counter = 0x50F00800
VIA1 T1 High Order Counter = 0x50F00A00
VIA1 T1 Low Order latches = 0x50F00C00
VIA1 T1 High Order Latches = 0x50F00E00
VIA2 Interrupt Flag Register = 0x50F03A00
VIA2 Interrupt Enable Register = 0x50F03C00
VIA2 Slot Interrupt Flag Register = 0x50F03E00
DMA Interrupt Flag Register = 0x50F2A008
DMA audio = 0x50F2A00A