Added CLoIo I/O Access abstraction

Added ifcLoIo interfaces and the CLoIo classes for the I/O register/memory access abstraction.
Each class controls the access to register specified. For example: CLoIoW32 ioW(REG1) allows write access to REG1 only: ioW.write(DATA).

This is multiple way to use the register abstractions. Each way has his own benefits and drawbacks:
1. Create as part of the class using the registers as class members.
Midle level of control to registers acccesses throgh review (registers defined at single location).
Seldom used configuaration registers remainsd accessible over the entire class live time
2. Create temporary on the stack during the register access.
Seldom used configuration registers are accessible during the usage only
Low level on control where and for which purpose the registers are used
3. Create classes with register banks. Other classes shall use ports/association to gain the access to the registers
High level of control where which register used
All used I/O registers are defined and reviewed at single location.
Control over the access through the liverime of the port links/associations between classes exclude access to configurationsregister at run time.

This is no general solution. Every projact shall have his optimal solution.