NOFReactive / Blog: Recent posts

Implemented the CBoard for POSIX. The CBoard includes following components:
32 Bit CLoIO read and write I/O simulation.
CAN interface simulation.

The simulated I/O and CAN output is directed to stdio, input read from stdin.
Read more about commands on the wiki page.

The POSIX CBoard shall be used for the development and the testing of the platform independent high layer units.

Started projekt to add CBoard IO and CAN abstractions for POSIX platform:
* Write IO access printed to STDOUT
* Read IO access asznchroneously captured from STDIN
* CAN tx printed to STDOUT
* CAN rx read aszncroneously from STDIN

The implementation shall allow development of the high level drivers without access to HW.

The SAMC21 low level can is implemented and tested:
* Rx CAN messages
* Tx CAN messages
* Cancellation of the CAN messages

The implementation uses SAMC21 dedicated buffers:
* Up to 64 rx buffers
* Up to 32 tx buffers

Rx interrupt used for rx data processing
Per message Rx message statistics (period, amount of messages discarded).
Tx does not uses interrupt
Message processing does not requires to disable the interrupt(s).... read more

New release includes changes for the SAMC21 target.
The Atmel SAMC21 XPLAINED PRO board contains 32.768 KHz quarz oscillator only.
This is considered as stable clock source, compared with internal 48 MHz oscillator.
For this reason DPPL used to increase the 32.768 KHz to 48 MHz.
The DPPL output distributed to 24 MHz main clock using GEN0 and to 12 MHz perepherial clock using GEN2 generic clock generators.
The system wide clock setting (used for timer configuration) updated too.... read more

The major change in this version is the introduction of the CLoIo I/O access and the use of the CLoIo classes in the SAMC21 project.
The functionality of the SAMC21 example not changed. The I/O access in this project does not uses the PORT-> registers directly. The CLoIo objects are created temporary on the stack to handle the accesses.

See https://sourceforge.net/p/nofreactive/svn/HEAD/tree/NOF/branches/NOFReactive_01.01.00.00/

Added ifcLoIo interfaces and the CLoIo classes for the I/O register/memory access abstraction.
Each class controls the access to register specified. For example: CLoIoW32 ioW(REG1) allows write access to REG1 only: ioW.write(DATA).

This is multiple way to use the register abstractions. Each way has his own benefits and drawbacks:
1. Create as part of the class using the registers as class members.
Midle level of control to registers acccesses throgh review (registers defined at single location).
Seldom used configuaration registers remainsd accessible over the entire class live time
2. Create temporary on the stack during the register access.
Seldom used configuration registers are accessible during the usage only
Low level on control where and for which purpose the registers are used
3. Create classes with register banks. Other classes shall use ports/association to gain the access to the registers
High level of control where which register used
All used I/O registers are defined and reviewed at single location.
Control over the access through the liverime of the port links/associations between classes exclude access to configurationsregister at run time.... read more

Added memory allocator to samc21 board abstraction: automatically use free (unused memory) for "operator new".

SAMC21 example in the NOFREACTIVE_SAMC21: Application state chart based on NOFReactive, CBoard abstraction inclusive 1 LED and 1 Button 3.5 KByte code and RO data image size using Keil uVision 5.2 compiler.
Probably this is the smallest Rhapsody application ever.