Thread: [Nasm-devel] [PATCH 0/6] AVX-512: Bug fixes and additional features

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[Nasm-devel] [PATCH 0/6] AVX-512: Bug fixes and additional features

From: Jin K. S. <jin...@in...> - 2013-08-22 02:30:12

Please review these patches and pull if they look good.
git://repo.or.cz/nasm/avx512.git

After running a test case, various issues were found. One major thing is
curly brace already used for grouping multi-line macro parameters.
An escape backward slash character '\' is added when braces are passed
as a part of enclosed parameter. The test asm file used here is also included.

Patch "AVX-512: Add a test case for EVEX encoded instructions" is
relatively huge. So I did not attch that patch in this email. Please refer to
http://repo.or.cz/w/nasm/avx512.git/commitdiff/a4a573c47f3d9ddfd5c2521804454327765f367e

- Jin Song

Jin Kyu Song (6):
  AVX-512: Handle curly braces in multi-line macro parameters
  AVX-512: Add a test case for EVEX encoded instructions
  AVX-512: Reword comment about opmask decorators
  AVX-512: Fix instruction match function
  AVX-512: Add ZWORD keyword
  AVX-512: Fix parser to handle opmask decorator correctly

 assemble.c       |   37 +-
 disasm.c         |    3 +
 nasm.h           |   19 +-
 parser.c         |   20 +-
 preproc.c        |    5 +
 tables.h         |    2 +-
 test/avx512f.asm | 9221 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 test/gas2nasm.py |   88 +
 tokens.dat       |    1 +
 9 files changed, 9383 insertions(+), 13 deletions(-)
 create mode 100644 test/avx512f.asm
 create mode 100755 test/gas2nasm.py

-- 
1.7.9.5

[Nasm-devel] [PATCH 1/6] AVX-512: Handle curly braces in multi-line macro parameters

From: Jin K. S. <jin...@in...> - 2013-08-22 02:30:13

Multi-line macro uses curly braces for enclosing a parameter
containing comma(s). Passing curly braces as a part of a parameter
which is already enclosed with braces confuses the macro expander.

Escape character '\' is prefixed in this case.
e.g.) mmacro {1,2,3}, {4,\{5,6\}}
      mmacro gets 2 parameters of '1,2,3' and '4,{5,6}'

Signed-off-by: Jin Kyu Song <jin...@in...>
---
 preproc.c |    5 +++++
 1 file changed, 5 insertions(+)

diff --git a/preproc.c b/preproc.c
index e2b12e4..b878e4b 100644
--- a/preproc.c
+++ b/preproc.c
@@ -208,6 +208,7 @@ enum pp_token_type {
     TOK_PREPROC_Q, TOK_PREPROC_QQ,
     TOK_PASTE,              /* %+ */
     TOK_INDIRECT,           /* %[...] */
+    TOK_BRACE,              /* \{...\} */
     TOK_SMAC_PARAM,         /* MUST BE LAST IN THE LIST!!! */
     TOK_MAX = INT_MAX       /* Keep compiler from reducing the range */
 };
@@ -1103,6 +1104,10 @@ static Token *tokenize(char *line)
             type = TOK_COMMENT;
             while (*p)
                 p++;
+        } else if (p[0] == '\\' && (p[1] == '{' || p[1] == '}')) {
+            type = TOK_BRACE;
+            p += 2;
+            line++;
         } else {
             /*
              * Anything else is an operator of some kind. We check
-- 
1.7.9.5

Re: [Nasm-devel] [PATCH 1/6] AVX-512: Handle curly braces in multi-line macro parameters

From: anonymous c. <nas...@us...> - 2013-08-25 19:11:10

> Multi-line macro uses curly braces for enclosing a parameter
> containing comma(s). Passing curly braces as a part of a parameter
> which is already enclosed with braces confuses the macro expander.
>
> Escape character '\' is prefixed in this case.
> e.g.) mmacro {1,2,3}, {4,\{5,6\}}
>       mmacro gets 2 parameters of '1,2,3' and '4,{5,6}'
>
> Signed-off-by: Jin Kyu Song <jin...@in...>

Yes, curly braces inside mmac params should be handled properly.

But no, you really do not want to introduce backslash escaping -- it
breaks existing code that has backslashes in mmac params.

Also, there is no need to mess around with the curly brace code of
the preprocessor when it comes to AVX-512 -- the preprocessor has
no concept of {xxx} modifiers; from its perspective that's just a curly
brace, followed by xxx, followed by another curly brace.

Only the (assembler's) parser needs to understand {xxx} modifiers,
and it's really trivial to handle them there.

[Nasm-devel] [PATCH 3/6] AVX-512: Reword comment about opmask decorators

From: Jin K. S. <jin...@in...> - 2013-08-22 02:30:15

Previous comment was not so clear.

Signed-off-by: Jin Kyu Song <jin...@in...>
---
 parser.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/parser.c b/parser.c
index 5571c6f..4b3f059 100644
--- a/parser.c
+++ b/parser.c
@@ -196,7 +196,7 @@ static void process_size_override(insn *result, int operand)
 /*
  * when two or more decorators follow a register operand,
  * consecutive decorators are parsed here.
- * the order of decorators does not matter.
+ * opmask and zeroing decorators can be placed in any order.
  * e.g. zmm1 {k2}{z} or zmm2 {z,k3}
  * decorator(s) are placed at the end of an operand.
  */
-- 
1.7.9.5

[Nasm-devel] [PATCH 4/6] AVX-512: Fix instruction match function

From: Jin K. S. <jin...@in...> - 2013-08-22 02:30:16

When an instruction allows broadcasting, the memory element size is
different from the size of normal memory operation.
This information is provided in a decoflags field, so it should try to
match those properties before it fails.

Signed-off-by: Jin Kyu Song <jin...@in...>
---
 assemble.c |   35 +++++++++++++++++++++++++++++++----
 nasm.h     |   18 ++++++++++++++++--
 tables.h   |    2 +-
 3 files changed, 48 insertions(+), 7 deletions(-)

diff --git a/assemble.c b/assemble.c
index 6054d4a..83971f6 100644
--- a/assemble.c
+++ b/assemble.c
@@ -1915,10 +1915,22 @@ static enum match_result find_match(const struct itemplate **tempp,
     enum match_result m, merr;
     opflags_t xsizeflags[MAX_OPERANDS];
     bool opsizemissing = false;
+    int8_t broadcast = -1;
     int i;
 
+    /* find the position of broadcasting operand */
     for (i = 0; i < instruction->operands; i++)
-        xsizeflags[i] = instruction->oprs[i].type & SIZE_MASK;
+        if (instruction->oprs[i].decoflags & BRDCAST_MASK) {
+            broadcast = i;
+            break;
+        }
+
+    /* broadcasting uses a different data element size */
+    for (i = 0; i < instruction->operands; i++)
+        if (i == broadcast)
+            xsizeflags[i] = instruction->oprs[i].decoflags & BRSIZE_MASK;
+        else
+            xsizeflags[i] = instruction->oprs[i].type & SIZE_MASK;
 
     merr = MERR_INVALOP;
 
@@ -1936,7 +1948,10 @@ static enum match_result find_match(const struct itemplate **tempp,
              * Missing operand size and a candidate for fuzzy matching...
              */
             for (i = 0; i < temp->operands; i++)
-                xsizeflags[i] |= temp->opd[i] & SIZE_MASK;
+                if (i == broadcast)
+                    xsizeflags[i] |= temp->deco[i] & BRSIZE_MASK;
+                else
+                    xsizeflags[i] |= temp->opd[i] & SIZE_MASK;
             opsizemissing = true;
         }
         if (m > merr)
@@ -1962,7 +1977,10 @@ static enum match_result find_match(const struct itemplate **tempp,
         if ((xsizeflags[i] & (xsizeflags[i]-1)))
             goto done;                /* No luck */
 
-        instruction->oprs[i].type |= xsizeflags[i]; /* Set the size */
+        if (i == broadcast)
+            instruction->oprs[i].decoflags |= xsizeflags[i];
+        else
+            instruction->oprs[i].type |= xsizeflags[i]; /* Set the size */
     }
 
     /* Try matching again... */
@@ -2107,7 +2125,16 @@ static enum match_result matches(const struct itemplate *itemp,
         } else if ((itemp->opd[i] & SIZE_MASK) &&
                    (itemp->opd[i] & SIZE_MASK) != (type & SIZE_MASK)) {
             if (type & SIZE_MASK) {
-                return MERR_INVALOP;
+                /*
+                 * when broadcasting, the element size depends on
+                 * the instruction type. decorator flag should match.
+                 */
+#define MATCH_BRSZ(bits) (((type & SIZE_MASK) == BITS##bits) &&             \
+                          ((itemp->deco[i] & BRSIZE_MASK) == BR_BITS##bits))
+                if (!((deco & BRDCAST_MASK) &&
+                      (MATCH_BRSZ(32) || MATCH_BRSZ(64)))) {
+                    return MERR_INVALOP;
+                }
             } else if (!is_class(REGISTER, type)) {
                 /*
                  * Note: we don't honor extrinsic operand sizes for registers,
diff --git a/nasm.h b/nasm.h
index 628ec43..e46b5ca 100644
--- a/nasm.h
+++ b/nasm.h
@@ -1038,6 +1038,7 @@ enum decorator_tokens {
  * ..........................1..... broadcast
  * .........................1...... static rounding
  * ........................1....... SAE
+ * ......................11........ broadcast element size
  */
 #define OP_GENVAL(val, bits, shift)     (((val) & ((UINT64_C(1) << (bits)) - 1)) << (shift))
 
@@ -1096,10 +1097,23 @@ enum decorator_tokens {
 #define SAE_MASK                OP_GENMASK(SAE_BITS, SAE_SHIFT)
 #define GEN_SAE(bit)            OP_GENBIT(bit, SAE_SHIFT)
 
+/*
+ * Broadcasting element size.
+ *
+ * Bits: 8 - 9
+ */
+#define BRSIZE_SHIFT            (8)
+#define BRSIZE_BITS             (2)
+#define BRSIZE_MASK             OP_GENMASK(BRSIZE_BITS, BRSIZE_SHIFT)
+#define GEN_BRSIZE(bit)         OP_GENBIT(bit, BRSIZE_SHIFT)
+
+#define BR_BITS32               GEN_BRSIZE(0)
+#define BR_BITS64               GEN_BRSIZE(1)
+
 #define MASK                    OPMASK_MASK             /* Opmask (k1 ~ 7) can be used */
 #define Z                       Z_MASK
-#define B32                     BRDCAST_MASK            /* {1to16} : load+op instruction can broadcast when it is reg-reg operation */
-#define B64                     BRDCAST_MASK            /* {1to8}  : There are two definitions just for conforming to SDM */
+#define B32                     (BRDCAST_MASK|BR_BITS32) /* {1to16} : broadcast 32b * 16 to zmm(512b) */ 
+#define B64                     (BRDCAST_MASK|BR_BITS64) /* {1to8}  : broadcast 64b *  8 to zmm(512b) */
 #define ER                      STATICRND_MASK          /* ER(Embedded Rounding) == Static rounding mode */
 #define SAE                     SAE_MASK                /* SAE(Suppress All Exception) */
 
diff --git a/tables.h b/tables.h
index d0db3b3..4b14566 100644
--- a/tables.h
+++ b/tables.h
@@ -62,7 +62,7 @@ extern const char * const nasm_insn_names[];
 extern const char * const nasm_reg_names[];
 /* regflags.c */
 typedef uint64_t opflags_t;
-typedef uint8_t  decoflags_t;
+typedef uint16_t  decoflags_t;
 extern const opflags_t nasm_reg_flags[];
 /* regvals.c */
 extern const int nasm_regvals[];
-- 
1.7.9.5

[Nasm-devel] [PATCH 5/6] AVX-512: Add ZWORD keyword

From: Jin K. S. <jin...@in...> - 2013-08-22 02:30:17

ZWORD (512 bits) keyword is added

Signed-off-by: Jin Kyu Song <jin...@in...>
---
 assemble.c |    2 ++
 disasm.c   |    3 +++
 nasm.h     |    1 +
 parser.c   |    5 +++++
 tokens.dat |    1 +
 5 files changed, 12 insertions(+)

diff --git a/assemble.c b/assemble.c
index 83971f6..4f0cd9c 100644
--- a/assemble.c
+++ b/assemble.c
@@ -265,6 +265,8 @@ static const char *size_name(int size)
         return "oword";
     case 32:
         return "yword";
+    case 64:
+        return "zword";
     default:
         return "???";
     }
diff --git a/disasm.c b/disasm.c
index 9d2e1b1..cc55d2c 100644
--- a/disasm.c
+++ b/disasm.c
@@ -1303,6 +1303,9 @@ int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
             if (t & BITS256)
                 slen +=
                     snprintf(output + slen, outbufsize - slen, "yword ");
+            if (t & BITS512)
+                slen +=
+                    snprintf(output + slen, outbufsize - slen, "zword ");
             if (t & FAR)
                 slen += snprintf(output + slen, outbufsize - slen, "far ");
             if (t & NEAR)
diff --git a/nasm.h b/nasm.h
index e46b5ca..fc5a18d 100644
--- a/nasm.h
+++ b/nasm.h
@@ -1011,6 +1011,7 @@ enum special_tokens {
     S_TWORD,
     S_WORD,
     S_YWORD,
+    S_ZWORD,
     SPECIAL_ENUM_LIMIT
 };
 
diff --git a/parser.c b/parser.c
index 4b3f059..ccbce49 100644
--- a/parser.c
+++ b/parser.c
@@ -660,6 +660,11 @@ is_expression:
                     result->oprs[operand].type |= BITS256;
                 setsize = 1;
                 break;
+            case S_ZWORD:
+                if (!setsize)
+                    result->oprs[operand].type |= BITS512;
+                setsize = 1;
+                break;
             case S_TO:
                 result->oprs[operand].type |= TO;
                 break;
diff --git a/tokens.dat b/tokens.dat
index 1a00e3d..d12b296 100644
--- a/tokens.dat
+++ b/tokens.dat
@@ -72,6 +72,7 @@ to
 tword
 word
 yword
+zword
 
 % TOKEN_FLOAT, 0, 0, 0
 __infinity__
-- 
1.7.9.5

[Nasm-devel] [PATCH 6/6] AVX-512: Fix parser to handle opmask decorator correctly

From: Jin K. S. <jin...@in...> - 2013-08-22 02:30:18

When a memory reference operand is a destination, this could have
an opmask decorator as well.

Signed-off-by: Jin Kyu Song <jin...@in...>
---
 parser.c |   13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/parser.c b/parser.c
index ccbce49..585abe2 100644
--- a/parser.c
+++ b/parser.c
@@ -758,17 +758,20 @@ is_expression:
                 recover = true;
             } else {            /* we got the required ] */
                 i = stdscan(NULL, &tokval);
-                if (i == TOKEN_DECORATOR) {
+                if ((i == TOKEN_DECORATOR) || (i == TOKEN_OPMASK)) {
                     /*
-                     * according to AVX512 spec, only broacast decorator is
-                     * expected for memory reference operands
+                     * according to AVX512 spec, broacast or opmask decorator
+                     * is expected for memory reference operands
                      */
                     if (tokval.t_flag & TFLAG_BRDCAST) {
                         brace_flags |= GEN_BRDCAST(0);
                         i = stdscan(NULL, &tokval);
+                    } else if (i == TOKEN_OPMASK) {
+                        brace_flags |= VAL_OPMASK(nasm_regvals[tokval.t_integer]);
+                        i = stdscan(NULL, &tokval);
                     } else {
-                        nasm_error(ERR_NONFATAL, "broadcast decorator"
-                                   "expected inside braces");
+                        nasm_error(ERR_NONFATAL, "broadcast or opmask "
+                                   "decorator expected inside braces");
                         recover = true;
                     }
                 }
-- 
1.7.9.5