From: H. P. A. <hp...@zy...> - 2015-11-05 21:24:43
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On 11/05/15 12:51, Mark Scott wrote: >>> >>> So, I believe the logic should in fact be the exactly same logic that we >>> have for VEX: >>> >>> if (segsize == 64 || (data[1] & 0xc0) == 0xc0) { >> >> Ah, good point! Thanks for clarification, Peter! I'll fix >> > > Apologies for the mistake, and thanks for spotting! > No worries, thank you for spotting the original problem! -hpa |