[nasm:master] disasm: Fix disassembling of evex prefix

[nasm-bot f. C. G. <gor...@gm...>]

Commit-ID:  a2a2d19f434380cd00fe31c9ea1734939eb2dadd
Gitweb:     http://repo.or.cz/w/nasm.git?a=commitdiff;h=a2a2d19f434380cd00fe31c9ea1734939eb2dadd
Author:     Cyrill Gorcunov <gor...@gm...>
AuthorDate: Thu, 5 Nov 2015 01:14:05 +0300
Committer:  Cyrill Gorcunov <gor...@gm...>
CommitDate: Thu, 5 Nov 2015 01:14:45 +0300

disasm: Fix disassembling of evex prefix

As been pointed by @hpa evex is pretty fine in ia-32.

Quoting Peter

 | This is wrong, though; EVEX is permitted in 32-bit mode just as VEX is.
 | The key thing is that bits [7:5] have to be 1 in 32-bit mode.  It is
 | unclear what happens if these bits are 110 as that depends on if it is
 | decoded using the modr/m decoder or not.  For VEX prefixes we accept
 | them as VEX in that case, which may not match the CPU.

This is a fix for commit db6ecf9b76a2

Reported-by: "H. Peter Anvin" <hp...@zy...>
Signed-off-by: Cyrill Gorcunov <gor...@gm...>


---
 disasm.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/disasm.c b/disasm.c
index da39632..51c6578 100644
--- a/disasm.c
+++ b/disasm.c
@@ -1215,9 +1215,9 @@ int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
 
         case 0x62:
         {
-            uint8_t evex_p0 = data[1] & 0x0f;
-            if (segsize == 64 &&
-                ((evex_p0 >= 0x01) && (evex_p0 <= 0x03))) {
+            if (segsize == 64 || ((data[1] & 0xc0) == 0xc0)) {
+                uint8_t evex_p0 = data[1] & 0x0f;
+
                 data++;        /* 62h EVEX prefix */
                 prefix.evex[0] = *data++;
                 prefix.evex[1] = *data++;