[nasm:master] iflags: Add IF_EVEX for checking {evex} availability

[nasm-bot f. J. K. S. <jin...@in...>]

Commit-ID:  6cfa968e8d3ef6344ef3e92b37d64a277124ee29
Gitweb:     http://repo.or.cz/w/nasm.git?a=commitdiff;h=6cfa968e8d3ef6344ef3e92b37d64a277124ee29
Author:     Jin Kyu Song <jin...@in...>
AuthorDate: Tue, 26 Nov 2013 17:27:48 -0800
Committer:  Jin Kyu Song <jin...@in...>
CommitDate: Wed, 27 Nov 2013 15:43:33 -0800

iflags: Add IF_EVEX for checking {evex} availability

For checking the availability of {evex} prefix, AVX512 iflag
has been used. But this is a flag for an instruction set
not for an encoding scheme. And there are some AVX512 instructions
encoded with VEX prefix.

So a new instruction flag (IF_EVEX) is added for the instructions
which are actually encoded with EVEX prefix.

This flag is automatically added by insns.pl, so no need to add manually
in insns.dat.

Signed-off-by: Jin Kyu Song <jin...@in...>


---
 assemble.c      | 13 ++++++++++---
 insns-iflags.pl |  1 +
 insns.pl        |  4 +---
 3 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/assemble.c b/assemble.c
index a7ca1aa..759e4b5 100644
--- a/assemble.c
+++ b/assemble.c
@@ -692,6 +692,9 @@ int64_t assemble(int32_t segment, int64_t offset, int bits, iflag_t cp,
             error(ERR_NONFATAL, "instruction not supported in %d-bit mode",
                   bits);
             break;
+        case MERR_ENCMISMATCH:
+            error(ERR_NONFATAL, "specific encoding scheme not available");
+            break;
         case MERR_BADBND:
             error(ERR_NONFATAL, "bnd prefix is not allowed");
             break;
@@ -2093,6 +2096,13 @@ static enum match_result matches(const struct itemplate *itemp,
 	return MERR_INVALOP;
 
     /*
+     * {evex} available?
+     */
+	if (instruction->prefixes[PPS_EVEX] && !itemp_has(itemp, IF_EVEX)) {
+        return MERR_ENCMISMATCH;
+    }
+
+    /*
      * Check that no spurious colons or TOs are present
      */
     for (i = 0; i < itemp->operands; i++)
@@ -2232,9 +2242,6 @@ static enum match_result matches(const struct itemplate *itemp,
                  */
                 return MERR_BRNUMMISMATCH;
             }
-        } else if (instruction->prefixes[PPS_EVEX] &&
-                   !itemp_has(itemp, IF_AVX512)) {
-            return MERR_ENCMISMATCH;
         }
     }
 
diff --git a/insns-iflags.pl b/insns-iflags.pl
index da2fd9b..be36193 100644
--- a/insns-iflags.pl
+++ b/insns-iflags.pl
@@ -120,6 +120,7 @@ my %insns_flag_bit = (
     "TBM"               => [ 60, ""],
     "RTM"               => [ 61, ""],
     "INVPCID"           => [ 62, ""],
+    "EVEX"              => [ 63, ""],
 
     #
     # dword bound, index 2 - instruction filtering flags
diff --git a/insns.pl b/insns.pl
index 2ce9a51..67333ad 100755
--- a/insns.pl
+++ b/insns.pl
@@ -495,9 +495,7 @@ sub format_insn($$$$$) {
     $nd = 1 if $flags =~ /(^|\,)ND($|\,)/;
     $flags =~ s/(^|\,)ND($|\,)/\1/g;
     $flags =~ s/(^|\,)X64($|\,)/\1LONG,X86_64\2/g;
-    $flags =~ s/(^|\,)AVX512CD($|\,)/\1AVX512CD,AVX512\2/g;
-    $flags =~ s/(^|\,)AVX512ER($|\,)/\1AVX512ER,AVX512\2/g;
-    $flags =~ s/(^|\,)AVX512PF($|\,)/\1AVX512PF,AVX512\2/g;
+    $flags .= ",EVEX" if ($codes =~ /evex\./);
     $rawflags = $flags;
     $flagsindex = insns_flag_index(split(',',$flags));