From: anonymous c. <nas...@us...> - 2013-10-03 14:16:02
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>> > Signed-off-by: Jin Kyu Song <jin...@in...> >> > -CVTPI2PS xmmreg,mmxrm64 [rm: np 0f 2a /r] KATMAI,SSE,MMX >> > -CVTPS2PI mmxreg,xmmrm64 [rm: np 0f 2d /r] KATMAI,SSE,MMX >> > +CVTPI2PS xmmreg,mmxrm64 [rm: np 0f 2a /r] KATMAI,SSE >> > +CVTPS2PI mmxreg,xmmrm64 [rm: np 0f 2d /r] KATMAI,SSE >> >> Why you've changed flags here and a couple of other places? > > The reason is actually written in the commit message. "Since they are not > bit masks, only one instruction set is allowed for each instruction." So > both SSE and MMX could not be set for one instruction. This needs to be addressed/fixed. In the meantime, please modify your change to at least retain a comment for those insns.dat entries, so that we don't lose the right flags altogether. It took a lot of effort to put them into the place to begin with. |