From: Song, J. K. <jin...@in...> - 2013-08-28 09:55:58
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> -----Original Message----- > From: Cyrill Gorcunov [mailto:gor...@gm...] > Sent: Tuesday, August 27, 2013 10:44 PM > To: Song, Jin Kyu > Cc: nas...@li... > Subject: Re: [Nasm-devel] [PATCH 6/7] AVX-512: Change the data type for > instruction flags > > On Mon, Aug 26, 2013 at 08:28:42PM -0700, Jin Kyu Song wrote: > > Increased the size of data type for instruction flags from 32bits to > 64bits. > > And a new type (iflags_t) is defined for better maintainability. > > > > Bigger data type is needed because more instruction set types are coming > > but there were not enough space for them. Since they are not bit masks, > > only one instruction set is allowed for each instruction. > > > > Signed-off-by: Jin Kyu Song <jin...@in...> > > -CVTPI2PS xmmreg,mmxrm64 [rm: np 0f 2a /r] > KATMAI,SSE,MMX > > -CVTPS2PI mmxreg,xmmrm64 [rm: np 0f 2d /r] > KATMAI,SSE,MMX > > +CVTPI2PS xmmreg,mmxrm64 [rm: np 0f 2a /r] > KATMAI,SSE > > +CVTPS2PI mmxreg,xmmrm64 [rm: np 0f 2d /r] > KATMAI,SSE > > Why you've changed flags here and a couple of other places? The reason is actually written in the commit message. "Since they are not bit masks, only one instruction set is allowed for each instruction." So both SSE and MMX could not be set for one instruction. As nasm64developer mentioned in his email, this may not be a proper way to expand and define bits for instruction sets. And it needs a major restructuring of instruction flags not a simple fix of increasing data type size. The original purpose of this change was merely that I needed a way to distinguish EVEX instruction from VEX one which has exactly same operand types. For example, "vmovq xmm30,xmm29" should be encoded with EVEX because of high-16 registers but in the matches() function, I could not think of a way to see the current template being matched is VEX or EVEX except checking the first byte of bytecode (0240 or 0260). So I decided to enable instruction set flags in IF_*. static const struct itemplate instrux_VMOVQ[] = { {I_VMOVQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+13891, IF_AVX|IF_SANDYBRIDGE|IF_SQ}, {I_VMOVQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, NO_DECORATOR, nasm_bytecodes+9496, IF_AVX512|IF_FUTURE}, Please let me know any better way to implement this part. |