Re: [Nasm-devel] [PATCH] AVX-512: Add support for parsing braces

[anonymous c. <nas...@us...>]

>> In terms of modifier placement you probably want to look at
>> gas again -- I have seen code which has modifiers before an
>> operand, and I have seen code which has them as their own
>> operand. For example, {one} op1, {two}, op2.
>
> Could you explain a little bit more about this? Is it regarding
> {er} and {sae} that are put as if they are separate operands?

In short, yes.

For a longer more detailed background, read on.

With L1OM and K1OM, Intel picked a specific operand syntax:

  {transform} ( operand {nt} {eh} ) {mask}

In particular:

  L1OM = {sss,ccccc} ( operand {nt} ) {kkk}

  K1OM = {sss} ( operand {eh} ) {kkk}

As a result you can face a bunch of non-compliant asm code:

  - incorrect source operand has transform modifier
  - non-destination operand has mask modifier

  - transform modifier specified after operand
  - non-temporal or eviction hint specified before operand
  - mask modifier specified before operand

  - transform modifier operand not preceded by "("
  - transform modifier operand not followed by ")"

  - non-temporal or eviction hint specified after ")", not before
  - mask modifier specified before ")", not after

  - transform modifier invalid for memory operand
  - transform modifier invalid for register operand

  - modifier specified as extra operand

As well as these "modifier used as an operand" cases:

  - only operand --> ignored
  - leading operand --> applied to next operand
  - trailing operand --> applied to previous operand
  - in between operands --> applied to previous operand

With AVX-512 Intel failed to prescribe a specific operand syntax.

So the modifiers can go anywhere -- before or after any operand,
or as their own operands.