#21 add support for Centaur's AIS
We should consider adding support for Centaur's AIS.
The first part is trivial: add the ALTINST opcodes to the
instruction database in insns.dat:
ALTINST void \2\x0F\x3F 286
ALTINST imm \311\2\x8D\x84\17\40 386,SD,UNDOC
Wondering about the 286 and 386 flags? :-)
That gets us to the second part. While 0F xx requires
at least a 286, and 32-bit addressing requires at least
a 386, the proper flag for these two opcodes would be
something like CENTAUR, right?
Well, that would have to be defined in insns.h.
I haven't looked at the necessary changes to the [CPU]
directive, or the NDISASM. If there are any.
Last but not least, we should check with Centaur to
see whether they are willing to give us the AIS spec.
Maybe having native AIS support in NASM would be
a good bait? (But then, they probably already have a
means of assembling AIS code.)
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While the two ALTINST instructions should
go in, full native AIS support should not.
Why? Because native AIS is very different
from x86... and NASM is an x86 assembler.