#14 NEC V20/V30 support (done)
Hi !
I've wriiten a patch that adds support for the additional
instructions of NEC's V20/V30 processors. As I saw that
this feature is also (somewhere far down) on the TODO list,
I thought you might be interested.
The V20/V30 cpus are usually termed as 8088/86 clones
but include all new instructions introduced with 188/186
cpus as well as several completely new instructions and
an 8080-emulation mode. This patch adds the new
instructions, that where never added in the Intel
architecture.
Support for the 8080-instructions are missing, though.
I developped this patch on an x86 Linux box, but it should
work on other machines as well. The patch should apply
cleanly against an unmodified nasm-0.98.35 source tree.
The patch adds a new CPU target and the new instructions
to nasm itself, a new vendor flag to ndisasm (so that
it can
correctly disassemble the new instructions), and updates
the documentation to include the new instructions
(descriptions are from NEC's "User's Manual" -- somewhat
modified).
Open Issues:
* I have inserted the new "Instruction template flag"
between those for 186 and 286 cpus, so that nasm will
issue an error when it encounters a V20 instruction
when a 'smaller' cpu is selected. Nasm doesn't issue
an error when a 'larger', i.e. 286+, cpu is selected and
a V20 instruction is encountered, though :-(
* So far I have not executed the generated machine code
for the 'new' instructions on a real V20/V30, as the
harddisk of my XT (containing a V30 cpu) is broken.
The opcodes are generated as described in NEC's
"User's Manual", which I found somewhere on the Web,
and I checked the generated code against this manual,
so please don't shoot me (but tell me) if your V20/V30
complains about generated code.
* No support for V20/V30's 8080 emulation mode.
NEC V20/V30 patch against nasm-0.98.35
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According to the NEC manuals, there are more:
BRKXA Ib ; 0F E0 xx ; only V33A and V53A
RETXA Ib ; 0F F0 xx ; only V33A and V53A
BRKEM Ib ; 0F FF xx ; except V33A and V53A
RETI ; CF
; these two can't be coded in insns.dat right now
; because using \110 won't work for them
FPO2 imm4,rm ; if imm4=0...7h then 66 MMiiiR/M
FPO2 imm4,rm ; if imm4=8...Fh then 67 MMiiiR/M
; only V25 and V35
BRKCS reg16 ; 0F 2D rm ; [1]
BTCLR Ib,Ib,Jb ; 0F 9C xx xx xx
FINT ; 0F 92
MOVSPA ; 0F 25
MOVSPB reg16 ; 0F 95 rm ; [1]
RETRBI ; 0F 91
STOP ; 0F 9E
TSKSW reg16 ; 0F 94 rm ; [1]
; [1] reg16 must be AX/BX/CX/DX
Also, according to the opcodes.lst file which is part of
Ralf Brown's interrupt list, there are these two:
BRKN Ib ; 63 xx ; only V25 and V35 software guard
BRKS Ib ; F1 xx ; only V25 and V35 software guard
Enjoy!
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user_id=642138
Thanks for your comment.
As the title (and text) imply, the patch adds support for
V20/V30 cpus, i.e. the additional instructions of the other
Vx3 and Vx5 cpus are currently not support, but I will add them
when I have the time to do so.
As for the FPO2 instructions, I didn't add them on purpose,
because these are supposed to be new coprocessor prefixes,
which, as far as I know, have never ever been used, i.e.
interpreted and executed by any coprocessor.
The "BRKEM ib" instruction (0x0f 0xff imm8) is already supported
by the patch, and works similar to a usual "INT ib"
instruction,
but also switches the V20/V30 into 8080 emulation mode.
The RETI (0xcf) instruction is just NEC's name for Intel's
IRET (0xcf) instruction, and thus is already supported by
Nasm itself. (I didn't add those instructions that already
exist in Intel's instruction set, as this would mean adding all
8086 and 80186 instructions again using a different name and
changing register names as well.)
Here is a short list of all instructions added by the patch:
TEST1, CLR1, SET1, NOT1, ADD4S, SUB4S, CMP4S,
ROL4, ROR4, INS, EXT, BRKEM
The new REPE and REPNE prefixes are added as well.
When I have the time to do so, I will add the currently
missing Vx3 and Vx5 instructions, but this may take some
time as I'm currently working on my master thesis.