#289 Small mistake in documentation of SIB byte

closed-fixed
1
2007-04-11
2007-02-04
Anonymous
No

Section B.2.5 of the NASM manual includes the following sentence:

\\If mod is 0, r/m is 4 (meaning the SIB byte is present) and base is 4, the effective address encoded is not [EBP+index] as the above rules would suggest, but instead [disp32+index]: the displacement field is present and is four bytes long, and there is no base register (but the index register is still processed in the normal way).//

The second "4" should be a "5".

Reference: page 361 of http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24594.pdf

Poster: Alistair Turnbull (sf at minworks.co.uk).

Discussion

  • nasm64developer

    nasm64developer - 2007-02-04
    • priority: 5 --> 1
     
  • nasm64developer

    nasm64developer - 2007-02-04

    Logged In: YES
    user_id=804543
    Originator: NO

    > The second "4" should be a "5".

    Correct.

    Why the assembler manual (still) attempts to
    be a processor manual is beyond me -- IMO the
    whole Appendix B should be reduced to a list
    of mnemonics with operands (plus maybe them
    opcode and CPU flags) -- the rest should go.

     
  • Anonymous

    Anonymous - 2007-04-11
    • assigned_to: nobody --> kkanios
    • status: open --> closed-fixed
     
  • Anonymous

    Anonymous - 2007-04-11

    Logged In: YES
    user_id=1718224
    Originator: NO

    Fixed as of documentation found in 0.99.00.

     

Log in to post a comment.