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#181 segment registers - cs

open
nobody
None
1
2004-06-14
2004-06-13
No

NASM (nasmw 0.98.38) erroneously compiles this code:

pop cs
mov cs,ax

These instructions should be available only on 8086.
It should at least display some warning message if im
not compiling for 8086.

(as seen on RB's Interrupt List, file 86BUGS.LST
(C) Copyright 1993, 1994 By Harald Feldmann Revision
04, Nov 3rd 1994.

Hamarsoft's 86BUGS list, (C) 1993/94 By Hamarsoft (R)

"On the 86 and 88, but not on the C-MOS versions 80C86
and 80C88, the instruction MOV CS,op is valid and
causes an unconditional jump."
"The 88 and 86 allow the encoding of 0f for POP CS. The
NEC V20 and V30, as well as the 286+ CPUs use that
encoding to indicate new instructions. On the 88 and 86
POP CS causes an unconditional jump. Executing 0F on
the 186 generates an Invalid opcode exception (6).")

Thanks
Zdenek Sojka

Discussion

  • nasm64developer

    nasm64developer - 2004-06-14

    Logged In: YES
    user_id=804543

    Yes, POP CS was limited to the 8086/8088.
    Yes, MOV to CS was limited to the pre-CMOS 8086/8088.

    It would be difficult to make NASM warn whenever these
    two instructions are encountered but the CPU level is
    not exactly IF_8086. Instead a new flag could be added
    to insns.h and the affected insns.dat entries. (Think
    along the lines of IF_OLD, a la IF_UNDOC.)

    I have been using the above solution in my local forked
    version of NASM for quite some time now.

     
  • nasm64developer

    nasm64developer - 2004-06-14
    • priority: 5 --> 1
     
  • Nobody/Anonymous

    Logged In: NO

    Logically this should compile on the 8086, whether it runs
    correctly on the 8086 is a different matter. If you consult the
    original manual this instruction is allowed as an opcode
    although it will probably generate a fault.
    On the other hand one would have to be insane to use this
    kind of instruction anyway.

     

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