Activity for The Netwide Assembler
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Jason Liang created ticket #563
Infinite loop / null pointer access
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Iouri Kharon created ticket #198
New(?) opcodes
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wild pie posted a comment on discussion Expert questions
no problem, i come back checking updates just now. no delay to me, thanks for help,
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Trace Probe posted a comment on ticket #562
Hi Cyrill, I got the email registeration confirmation and just forwarded the reports to bugzilla. Thanks for your response.
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Cyrill Gorcunov posted a comment on ticket #562
Thanks for report. Once you manage to register on bugzilla copy it there please.
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Reporting the bug here since i am not able to create an account on Bugzilla Could you please try again. Hopefully I've fixed mailing issue on https://bugzilla.nasm.us/ if it won't pass please ping me directly to gorcunov@gmail.com
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The same POC file causes a "memory alignment error" for stable version nasm 2.13. 273 static uint8_t *do_ea(uint8_t *data, int modrm, int asize, 274 int segsize, enum ea_type type, 275 operand *op, insn *ins) ... 449 switch (mod) { 462 case 2: 463 op->segment |= SEG_DISP32; **464 op->offset = gets32(data);** 465 data += 4; 466 break; 467 } 468 return data; 469 } 470 } The error log is attached: disasm/disasm.c:464:26: runtime error: load of misaligned address 0x7ffc53ca36a3 for type 'uint32_t', which...
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We have moved to new hosting so there might be problem with emals and such because not eveything gone smooth yet, hopefully I manage to fix all the problems during the upcoming week.
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I'm very sorry for delay in reply, we happen to not use SF service novaday. I've activated your account on the forum, please try to login there and copy messages to.
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Stack-Buffer-Overflow in disasm (src/disasm/disasm.c)
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Stack buffer overflow (out-of-bound) in disasm (src/disasm/disasm.c)
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i'm using nasm 2.11.08
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also, i'd appreciate if you can activate my account (wild.pie) on nasm.us, in case i have other questions. thank you,
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well, i have existing code to manipulate 64-bit seg descriptors, but i don't have 32-bit protected mode code. the problem is cpu enforces flat memory in long mode. don't want to spend too much time on this, so i posted on stackoverflow and here's a response agreeing with my suspects: https://stackoverflow.com/questions/49721801/does-ebp2-reference-ds-or-ss-segment does this make sense? if i'm wrong, can you tell me why [ebp*2] is the same as [ebp+ebp}? thanks,
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but why [ebp+edx] and [edx+ebp] are different? it takes some time to test this in a 32-bit or 64-bit mode, but doable. is there an easier way to verify this?
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Debbie Wiles posted a comment on discussion Expert questions
This forum is generally considered abandoned. I've only very recently started coding again, but if you are still unable to register at nasm.us, I will try to help. As far as I recall, [ebp*2] is the same as [ebp + ebp*1]
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is this forum abandoned? tried to sign up on nasm.us forum, but cannot receive activation email. i had no problem signup here with same email. also, nasm generates [ebp, eiz] for [eiz, ebp] (optimization for shorter machine code, which i think is incorrect), but it generates different codes for [ebp, edx] and [edx, ebp], which is correct.
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nasm generates optimized code for [eax*2]. it generates the code as [eax + eax] instead. i just noticed it also replaces [ebp*2] with [ebp + ebp]. in [ebp*2], ebp is the index register, not base register. so this form references DS segment. in [ebp + ebp], ebp is used as base register, so it references SS segment. is this a nasm bug or i missed something? IDM vol 1 page 3-21 "Table 3-5 Default Segment Selection Rules", memory reference uses SS by default if EBP is used as base register Any memory...
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nasm generates optimized code for [eax*2]. it generates the code as [eax + eax] instead. i just noticed it also replaces [ebp*2] with [ebp + ebp]. in [ebp*2], ebp is the index register, not base register. so this form references DS segment. in [ebp + ebp], ebp is used as base register, so it references SS segment. is this a nasm bug or i missed something? IDM vol 1 page 3-21 "Table 3-5 Default Segment Selection Rules", memory reference uses SS by default if EBP is used as base register Any memory...
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nasm generates optimized code for [eax*2]. it generates the code as [eax + eax] instead. i just noticed it also replaces [ebp*2] with [ebp + ebp]. in [ebp*2], ebp is the index register, not base register. so this form references DS segment. in [ebp + ebp], ebp is used as base register, so it references SS segment. is this a nasm bug or i missed something? IDM vol 1 page 3-21 "Table 3-5 Default Segment Selection Rules", memory reference uses SS by default Any memory reference which uses the ESP or...
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Alain Kaufmann posted a comment on discussion Website
Hi, I have just dowloaded and installed the tool from the offical web site. Surprisingly, an application called Elara, and considered as a malware, has appeared on my computer. I'm currenlty trying to remove it.
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Anonymous modified a comment on ticket #521
EDIT: I shouldn't have listed 'mylabel dd 0' as a definition. I know that, and this is what I'd expect, mylabel will be translated to the address/offset, not to the value of the memory it precedes.
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Oleh Lukyrych created ticket #197
Ability to enable deprecated/experimental features via command line flags
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Ruslan Kabatsayev created ticket #560
ndisasm truncates 64 bit origin specified in command line
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Jonas Quinn created ticket #4
Minor fixes for typos
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The Netwide Assembler released /OldFiles/nasm-2.00rc1-os2.zip
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A Fog created ticket #559
AVX512 instructions with {sae} but no rounding control should specify vector size in LL bits
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vpinsrb vpinsrw vpextrb vpextrw with EVEX and memory operand have wrong compressed displacement
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afk posted a comment on discussion Expert questions
Thanks a million Ivan. The CS: was the problem. I had tried FAR before but without...
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Ivan Ngeow posted a comment on discussion Expert questions
I believe you should make these changes in NewCode: call far [cs:OLDINTADRoff] Remember...
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The code below is an attempt to re-vector a BIOS interrupt (09h) If the program is...
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Andrey posted a comment on ticket #539
you can use following combination: mov rax, 0x123456789abcdef0 ; 64-bit constant...
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Peter posted a comment on ticket #557
I found the root cause. The ndisasm come with Xcode is too old, version is "NDISASM...
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ndisasm hang
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Mike Morgan created ticket #556
error configuring NASM using MinGW/MSys
